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Method and apparatus for interrupting load equilibrium of multi-core processor

A multi-core processor, load balancing technology, applied in the field of communication, can solve the problem of not considering system load balancing, can not achieve interrupt processing, etc., to achieve the effect of balanced processing

Active Publication Date: 2009-01-28
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] For the interrupt processing of multi-core processors, if the system load balancing is not considered or the system load balancing is not considered according to the actual application, then the problem of better interrupt processing cannot be realized and the present invention is proposed. The present invention aims to provide a multi-core Processor interrupt load balancing method and device to solve the above problems

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  • Method and apparatus for interrupting load equilibrium of multi-core processor
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  • Method and apparatus for interrupting load equilibrium of multi-core processor

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[0029] Functional Overview

[0030] The present invention proposes an interrupt processing in multiple cores of a multi-core processor according to different interrupt configuration strategies, that is, adopting different interrupt balancing strategies according to actual applications, and using inter-processor interrupts to balance the multi-core processor on multiple cores Interrupt load balancing. After the initial allocation of interrupt processing required by multiple cores, the initial allocation is dynamically adjusted according to the actual application to avoid low-priority interrupts being lost due to high-priority interrupt processing on one core. Due to excessive interrupt processing, some key real-time tasks cannot be run, which improves the real-time performance, stability and reliability of the system; at the same time, it avoids the extra burden brought by a single interrupt scheduling algorithm to the application, and improves the overall performance of the sys...

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Abstract

The invention discloses an interrupt load balancing method for a multicore processor and a device thereof, wherein the multicore processor comprises a plurality of cores and an interrupt controller for controlling the interrupt handling of the cores. The method comprises the following steps of presetting a dispatching core group corresponding to an interrupt device and a default processing core which is one core in the dispatching core group; configuring the interrupt controller with the interrupt device routed to the corresponding default processing core; and controlling the interrupt controller to route the interrupt device to one or a plurality of cores in the dispatching core group to which the default processing core belongs when the interrupt number of the interrupt device exceeds an interrupt threshold value or the processing load of the default processing core exceeds an interrupt load. The method realizes the balancing handling of the interrupt.

Description

technical field [0001] The present invention relates to the communication field, in particular to a multi-core processor interrupt load balancing method and device. Background technique [0002] Interruption is one of the factors that affect system reliability. When an interrupt occurs, the processor handles the interrupt event. The following describes in detail how the single-core processor and the multi-core processor handle interrupts. [0003] In a single-core processor, when an interrupt occurs, the interrupt event is reported to the current processor, the processor saves the current context, and goes to execute the interrupt service routine. After the processing is completed, the previous context is restored to continue running; When many devices are attached to the processor, a large number of interrupts may be generated suddenly at a certain moment. Due to interrupt nesting, the processor may be in the interrupt environment for a long time, so some key real-time tas...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50
CPCG06F9/4812G06F2209/5022G06F9/505
Inventor 赵阳肖理
Owner ZTE CORP
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