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Decoders and decoding methods for nonvolatile semiconductor memory devices

A non-volatile, decoder technology, applied in the field of non-volatile semiconductor memory devices, which can solve problems such as drain-on, errors, etc.

Active Publication Date: 2008-05-14
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0019] However, as described above, if the memory cells connected to any one of the local word lines are over-erased, drain turn-on may occur due to the ground voltage applied to the non-selected word lines which may cause errors as described above. question

Method used

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  • Decoders and decoding methods for nonvolatile semiconductor memory devices
  • Decoders and decoding methods for nonvolatile semiconductor memory devices
  • Decoders and decoding methods for nonvolatile semiconductor memory devices

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Embodiment Construction

[0034] The present invention is described more fully hereinafter with reference to the accompanying drawings, in which various embodiments of the invention are shown. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0035] In the drawings, the size or layout of elements may be idealized or exaggerated for clarity. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements present. Like reference numerals ref...

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Abstract

A decoder for a non-volatile semiconductor memory device includes a level shifter configured to generate a negative first voltage at an output thereof responsive to a first state of a global word line and to generate a second voltage more positive than the first voltage responsive to a second state of the global word line. The decoder further includes a local word line driver having an input coupled to the output of the level shifter and configured to apply a voltage on a partial word line to a local word line when the output of the level shifter is at the first voltage and to apply the first voltage to the local word line when the output of the level shifter is at the second voltage.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 2006-107555 filed on November 2, 2006, the disclosure of which is hereby incorporated by reference. technical field [0003] The present invention relates to semiconductor memory devices, and more particularly to non-volatile semiconductor memory devices. Background technique [0004] Flash memory devices are generally electrically erasable and / or programmable, and are typically used for data storage in relatively large cells. Flash memory is widely used, for example, to store a basic input / output system (BIOS) in place of a hard disk, to store communication protocols in mobile phones, as image memory in digital cameras, and other storage applications. [0005] NOR-type flash memory devices generally have significantly more programming and reading speeds than other types of non-volatile memory devices. A typical NOR-type flash memory device includes ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/08
CPCG11C16/12G11C16/08G11C8/10G11C16/10G11C16/26G11C16/30
Inventor 赵志虎
Owner SAMSUNG ELECTRONICS CO LTD
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