Mosfet with temperature sense facility

A sensing and gate technology, applied in the field of FET, can solve the problem of difficult integration of MOSFET

Inactive Publication Date: 2008-04-02
NEXPERIA BV
View PDF2 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, this additional temperature sensing terminal will make it difficult to integrate MOSFETs in existing circuits
This MOSFET requires additional circuitry

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Mosfet with temperature sense facility
  • Mosfet with temperature sense facility
  • Mosfet with temperature sense facility

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0039] Referring to Figures 1-3, Figure 1 schematically illustrates a transistor device with a temperature sensing arrangement. 2 and 3 show a semiconductor substrate in top and side views.

[0040] A Field Effect Transistor (FET) 2 transistor region is provided on a semiconductor substrate 3, known as Field Effect Transistor Region 2 defining source, gate and drain regions. Any suitable transistor FET structure may be used, including horizontal and vertical structures.

[0041] The Zener diode 4 is electrically connected between the gate and the source of the FET 2, the cathode of the diode is connected to the gate of the FET 2, and the anode of the diode is connected to the source of the FET 2, as shown in FIG. 1 .

[0042] Although a single diode 4 is shown, multiple diodes in series oriented in the same direction could be used instead.

[0043] In FIGS. 2 and 3 a spatial arrangement is shown in which a gate bonding pad 5 and a bonding wire 9 are provided on a first main ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

A transistor (1) has a FET (2) and a temperature sensing diode (4) integrated within it. Gate drive circuit (12) is arranged to switch off FET (2) and in this case biasing circuit (14) drives a constant current through the diode (4). The voltage across the diode (4) is measured by voltage sensor (15) which provides a measure of the temperature of the FET.

Description

technical field [0001] The present invention relates to field effect transistors (FETs), and more particularly to FETs with sensing means. Background technique [0002] To protect devices or circuits from malfunctioning, Field Effect Transistors (FETs), such as Metal Oxide Semiconductor FETs (MOSFETs), may include temperature sensing elements to detect temperature fluctuations. [0003] This temperature sensing element can be integrated on a common substrate for faster detection of MOSFET fluctuations. In fact, the components can be integrated to form a MOSFET. For example, US2003 / 0210507 describes a temperature sensor with a MOS circuit structure, implemented as the gate of a MOS transistor, wherein the gate of the transistor is configured as a two-terminal network with a gate input and a gate output, by measuring the The pressure drop enables the temperature to be determined in situ. [0004] Furthermore, the use of semiconductor diodes as thermally coupled temperature ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L27/02
CPCG01K7/01H01L27/0248H01L2224/48463
Inventor 基思·赫彭斯托尔亚当·布朗艾德里安·高伊恩·肯尼迪
Owner NEXPERIA BV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap