Ethernet service assembly device and method
An Ethernet and business technology, applied in the field of communication transmission, can solve the problems of unfavorable promotion and application, complex structure level, multiple processing levels, etc., and achieve the effect of reducing technical complexity, simple structure and processing level, and strong reliability
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Embodiment 1
[0081] The converging process of Embodiment 1 is as follows: the branch side signals GE1 and GE2 enter the corresponding branch photoelectric conversion unit 701, and the branch photoelectric conversion unit 701 performs photoelectric conversion on the GE1 and GE2 signals to turn them into electrical signals and send them to PCS and MAC processing unit 702 . PCS and MAC processing unit 702 performs PCS and MAC processing on the Ethernet electrical signal, completes Ethernet frame positioning and 8B / 10B decoding, and parses the Ethernet frame, performs CRC checksum monitoring on the Ethernet frame, and then The GE1 and GE2 signals are divided into several data segments, and each data segment is added with a packet header SOP and a packet tail EOP, and is written into the corresponding FIFO buffer unit 703 according to the data message format in FIG. 4 . The time division multiplexing and demultiplexing unit 705 polls the data of each tributary FIFO buffer unit 703 by time slice...
Embodiment 2
[0084]The converging process of Embodiment 2 is as follows: the branch side signals GE and FE enter the corresponding branch photoelectric conversion unit 701, and the branch photoelectric conversion unit 701 performs photoelectric conversion on the GE and FE signals to make them into electrical signals and send them to the PCS and a MAC processing unit 702 . The PCS and MAC processing unit 702 performs PCS and MAC processing on the Ethernet electrical signal, completes frame positioning of the Ethernet, 8B / 10B decoding of the GE signal, and 4B / 5B decoding of the FE signal, and parses the Ethernet frame. The network frame is checked and monitored by CRC, and then the GE and FE signals are divided into several data segments, and each data segment is added with the packet header SOP and the packet tail EOP, and is written into the PCS and PCS of the branch according to the format of the FIFO in Figure 4. The FIFO cache unit 703 corresponding to the MAC processing unit 702 . The...
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