Flash memory section and method for erasing flash memory cluster

A memory and flash technology, applied in the field of flash memory group erasure and flash memory area erasure, which can solve the problems of wasting time and memory area leakage.

Active Publication Date: 2009-11-11
ELITE SEMICON MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, some memory areas may leak electricity every time, and need to be repaired every time
This situation will waste a lot of time

Method used

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  • Flash memory section and method for erasing flash memory cluster
  • Flash memory section and method for erasing flash memory cluster
  • Flash memory section and method for erasing flash memory cluster

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Embodiment Construction

[0030] As described below, the preferred embodiment of the present invention uses flags to designate memory regions that have bit line leakage currents, as well as memory regions that are validated by erase. The following embodiments therefore avoid deep over-erase and improve efficiency by omitting redundant and often harmful erase pulses. Another factor that improves the efficiency of the present invention is that the following embodiments use soft programmed confirmations that are faster than erase confirmations to reduce the frequency of use of inefficient erase confirmations.

[0031] Figure 5 It is a flowchart of a flash memory group erasing method according to an embodiment of the present invention. The flow starts at step 510 . First, Erase Verification (ERSV) is performed on this memory group. If the entire memory group is confirmed by erasing, the process ends here. Otherwise, the process goes to step 520 , and erase pulses are applied to all the memory areas no...

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PUM

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Abstract

A flash memory group erasing method includes the following steps: (a) applying erasing pulses to a first subset of a flash memory group. (b) performing soft programmed validation or strictly soft programmed validation on the first subset above. (c) Repeat steps (a) and (b) until the first preset condition is true. (d) performing erase validation on the second subset of the memory groups. (e) Steps (a) to (d) are repeated until the second preset condition is true. Finally, (f) repair the bit line leakage phenomenon of the third subset of the above-mentioned memory groups by slow programming and applying erase pulses.

Description

technical field [0001] The present invention relates to a flash memory, and in particular to a method for erasing a flash memory area and a method for erasing a flash memory group (METHOD FOR ERASING A FLASH MEMORY SECTORAND METHOD FOR ERASING A FLASH MEMORY GROUP). Background technique [0002] Every time a flash memory cell is erased, it is always possible to lower the threshold voltage of the memory cell. The so-called over-erase refers to the condition of bit line leakage in the flash memory cell. If a memory cell that has been over-erased is erased again, deep over-erase may occur. Because deep over-erasing cannot be repaired, it should be avoided if possible. [0003] figure 1 It is a flow chart of a conventional method for erasing a flash memory group. A flash memory group is a collection of multiple flash memory sectors. In step 110, an erase pulse (ERS pulse, that is, an erase pulse) is applied to a memory group to simultaneously erase all memory areas of the m...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/14
Inventor 林扬杰
Owner ELITE SEMICON MEMORY TECH INC
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