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Emulation components and system including distributed event monitoring, and testing of an IC design under emulation

a technology of emulation components and components, applied in the field of emulation, can solve problems such as preventing efficient operation of emulation systems

Active Publication Date: 2006-10-31
MENTOR GRAPHICS HLDG +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0008]Data processing resources are distributively provided to an emulation system to locally and correspondingly generate testing stimuli, and applying the generated testing stimuli to partitions of an IC design to be emulated. In one embodiment, the distributed data processing resources further locally and correspondingly retrieve state data of emulation state circuit elements, analyze the retrieved state data for one or more events, and report the one or more events upon their detection.

Problems solved by technology

Likewise, more and more state elements and / or signals of interest of the emulation ICs have to be transferred out of the emulation ICs and logic boards to facilitate analysis, leading to the formation of various bottlenecks, in particular, at the logic boards, preventing efficient operation of the emulation systems.

Method used

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  • Emulation components and system including distributed event monitoring, and testing of an IC design under emulation
  • Emulation components and system including distributed event monitoring, and testing of an IC design under emulation
  • Emulation components and system including distributed event monitoring, and testing of an IC design under emulation

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Embodiment Construction

[0022]In the following description, for purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one skilled in the art that the present invention may be practiced without the specific details. In other instances, well known features are omitted or simplified in order not to obscure the present invention.

[0023]Referring now to FIG. 1, where an overview of a logic board incorporated with the teachings of the present invention, in accordance with one embodiment, is illustrated. As shown, for the illustrated embodiment, logic board 100 of the present invention includes on-board data processing resources 102, on-board emulation ICs 104, on-board reconfigurable interconnects 106, on-board bus 108, and on-board trace memory 110 coupled to each other as shown (i.e. through on-board bus 108). Additionally, on-board emulation ICs 104 are also directly coupled to...

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Abstract

Data processing resources are distributively provided to an emulation system to locally and correspondingly generate testing stimuli, and applying the generated testing stimuli to partitions of an IC design to be emulated. In one embodiment, the distributed data processing resources further locally and correspondingly retrieve state data of emulation state circuit elements, analyze the retrieved state data for one or more events, and report the one or more events upon their detection. In one embodiment, the distributed data processing resources are disposed on logic boards of an emulation system. In other embodiments, at least some of the distributed data processing resources are disposed on the emulation ICs of the logic boards.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to the field of emulation. More specifically, the present invention relates to the components, such as integrated circuits and logic boards, employed to form emulation systems, and testing methodologies practiced thereon.[0003]2. Background Information[0004]The first generation of prior art emulation systems were typically formed using general purpose FPGAs without integrated debugging facilities. To emulate a circuit design on one of such emulation systems, the circuit design would be “realized” by compiling a formal description of the circuit design, partitioning the circuit design into subsets, mapping the various subsets to the logic elements (LEs) of the FPGAs of various logic boards of the emulation system, and then configuring and interconnecting the LEs. The partitioning and mapping operations would be typically performed on workstations that are part of or complementary to the emul...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G06F9/455G06F17/50
CPCG06F17/5027G06F30/331
Inventor REBLEWSKI, FREDERIC
Owner MENTOR GRAPHICS HLDG
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