Method of joining a chip on a substrate

Abstract

A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.

Description

CROSS REFERENCE TO RELATED APPLICATION[0001]This application is a divisional of co-pending application Ser. No. 12 / 551,960, filed on Sep. 1, 2009, and for which priority is claimed under 35 U.S.C. §120; the entire contents of which is are hereby incorporated by reference.[0002]The present invention relates to a method and apparatus of making a chip assembly by bonding a chip or other electronic component to a substrate. In particular, the present invention discloses a method and apparatus for assembling a silicon (Si) chip onto an organic substrate while applying mechanical force to the organic substrate to eliminate cracking or delamination in back end of line (BEOL) structure of the Si chip by reducing or preventing warping or bending of the organic substrate.BACKGROUND[0003]Flip chip is the name of a process in which a semiconductor Si chip is flipped over so that the connection pads face towards the substrate. Flip chip technology was first introduced by IBM in the solid logic t...

AI Technical Summary

Benefits of technology

[0016]The present disclosure provides a method and apparatus for assembling chips and substrates that reduces or prevents distortion such as bending and warping of the chip assembly. The present disclosure is useful in reducing or preventing bending and warping that can occur during the assembly of a chip or other electronic component onto a substrate, especially a flip chip assembly with organic substrates and chips that include low-k or ultralow-k materials. The present disclosure is especially useful in reducing or preventing bending and warping that can occur during a flip chip assembly process that heats and cools a chip assembly to bond a chip to a substrate. This is particularly useful in reducing or preventing distortion such as bending and warping that occur during a solder reflow process.

[0017]The disclosed methods and apparatuses reduce or eliminate distortions such as bending and warping that occur during chip assembly by providing a method and apparatus for restraining a substrate against the bending and warping stresses and strains that occur during chip assembly. In particular, the present disclosure provides a method and apparatus for applying a variable mechanical force and pressure to a substrate during the chip assembly process. This pressure is applied to at least a portion of the top surface and at least a portion of the bottom surface of the substrate to prevent or reducing bending and warping.

[0021]Distortions such as bending and warping of the chip assembly, including the substrate and the chip, can be reduced or prevented by the present disclosure, particularly the bending and warping that occur during assembly of a chip onto an organic substrate by a solder reflow process. This reduces or prevents opens and shorts in the chip assembly.

[0023]The disclosed methods and apparatuses reduce or prevent bending and warping in substrates such as ceramic and silicon substrates. They also reduce or prevent bending and warping within the BEOL structure of a chip, and cracking or delamination of the BEOL structure of a chip, and even cohesive failure between the layers of a chip, particularly during a solder reflow process. This is very useful for larger chips and coreless substrate technologies, which can bend and warp more than thincore substrates.

[0024]Another advantage of the disclosed methods and apparatuses is that they can be used during assembly of chips and substrates of any dimensions, including multiple chips and multiple substrates, to reduce or prevent bending and warping of the substrates and chips, including internal bending and warping of the BEOL structure of the chip.

Problems solved by technology

However, when organic substrates are used for the flip chip assembly, substrate bending and warpage can occur.

The thermally-induced stress / strain in the flip-chip structure often results in a failure of the BEOL structure.

This failure is becoming more common because low k dielectric layers are more fragile than solder joints.

They can impair the electrical and mechanical connections between the flip chip 100 and the substrate 106, and degrade the performance of the flip chip assembly.

This arrangement does not effectively control the thermal-mechanical stresses that occur during chip assembly, particularly during a solder reflow process, and can increase the stress or strain that develops in the chip.

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