Semiconductor device formed on insulating layer and method of manufacturing the same

Abstract

In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an upper side portion of a semiconductor layer is rounded. Thereby, concentration of an electric field at the upper side portion of the semiconductor layer can be prevented. As a result, lowering of a threshold voltage of a parasitic transistor can be prevented, so that the parasitic transistor does not adversely affect subthreshold characteristics of a regular transistor. Owing to provision of a concavity of a U-shaped section, generation of etching residue can be prevented when etching a gate electrode for patterning the same. Thereby, a disadvantage is not caused in connection with the manufacturing process.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates in general to a semiconductor device and a method of manufacturing the same, and in particular to a semiconductor device formed on an insulating layer and a method of manufacturing the same. [0003] 2. Description of the Background Art [0004] In order to improve the performance of semiconductor devices, there have been developed semiconductor devices in which circuit elements are isolated by dielectrics and a floating capacitance is small. For forming transistors on a thin silicon film on an insulating film, which will be referred to as an SOI (Silicon On Insulation) layer, an MESA isolating method is used for isolating the transistors from each other. According to this MESA isolating method, the isolated transistors are formed at completely isolated or insular SOI layers, respectively. This brings about many advantages such as prevention of influence of latch-up between adjacent transis...

AI Technical Summary

Benefits of technology

[0024] Another object of the invention is to provide a semiconductor device which can prevent concentration of an electric field at the vicinity of a side surface of an SOI layer.

[0081] Thereby, it is possible to prevent movement of oxidant to the lower surfaces of the first and second semiconductor layers when oxidizing the first and second semiconductor layers, and the nitride film reduces a difference in level between the first and second insulating layers.

Problems solved by technology

Therefore, a disadvantage occurs in connection with subthreshold characteristics of a regular MOS transistor formed at SOI layer 3.

More specifically, since the threshold voltage of parasitic transistor lowers as already described, such a disadvantage is caused that the parasitic transistor is turned on by a voltage lower than the threshold voltage of the regular transistor.

However, the proposed manufacturing process may suffer from the following problem.

Thereby, the subthreshold characteristics of regular transistor are adversely affected.

This lowers the threshold voltage of parasitic transistor, and thus the subthreshold characteristics of regular transistor are adversely affected.

As described above, various problems arise in the manufacturing process proposed in the prior art, and consequently, it is difficult to improve the subthreshold characteristics of regular transistor.

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