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A quick bit synchronous circuit

A bit synchronization and circuit technology, applied in electrical components, electromagnetic wave transmission systems, automatic power control, etc., can solve the problems of long synchronization time, low adaptation rate, complex circuits, etc., and achieve the effect of fast synchronization and bit synchronization

Inactive Publication Date: 2005-01-19
上海博为光电科技有限公司
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Problems solved by technology

[0005] The technical problem to be solved by the present invention is: the present invention mainly aims at the deficiencies of the prior art solutions, and designs a method that can solve the technical defects in the prior art solutions, such as the judgment sensitivity, complex circuit and low adaptation rate in the multi-phase judgment method. Fast bit synchronization circuit with problems such as long synchronization time and high residual jitter

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Embodiment Construction

[0020] Further description will be given below in conjunction with the accompanying drawings. According to FIG. 1 , the fast bit synchronization circuit of the present invention includes a nonlinear processing module, an injection voltage controlled oscillator, an active loop filter, a frequency discriminator and a D flip-flop.

[0021] Since there is no bit frequency f in the burst NRZ code b The line spectrum of , so the code stream must be nonlinearly preprocessed to extract f b Line spectrum, so as to realize the clock extraction of the injection phase-locked loop circuit. Therefore, the input digital signal is firstly divided into two channels, except that one channel is input to the D flip-flop as the original to-be-decided signal to wait for decision, and the other channel is used as the clock extraction signal. The clock extraction signal is first input to the nonlinear processing module, and the nonlinear processing is performed to extract the bit frequency f in the...

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Abstract

The invention is a fast bit synchronous circuit, including a nonlinear processing module, an injection synchronous phase-locked loop composed of an injection voltage controlled oscillator, an active loop filter, a frequency and phase identifier and a reference clock and a D trigger. A burst pulse signal code flow is preprocessed nonlinearly and then inputted to the injection synchronous phase-locked loop so as to realize fast synchronous clock oscillation output. The input reference clock of the phase identifier is provided by the system or generated by local oscillation and has no relation with data stream, thus able to meet the function of fast bit clock extraction of the burst signal. The invention can be widely applied to communication field in need of processing burst pulse code flow, such as passive optical network (PON), optical burst switching (OBS), optical packet switching (OPS) devices, instruments, modules, etc.

Description

1. Technical field: [0001] The invention relates to a high-speed clock recovery mechanism in a digital optical transmission communication system, in particular to a fast bit synchronization circuit applied to passive optical networks, optical burst switching, optical packet switching and other equipment, instruments and related modules. 2. Background technology: [0002] In the traditional digital optical transmission communication system, the clock recovery mechanism is to use the integrated phase-locked loop circuit to extract from the input code stream to achieve synchronization and recovery with the sending clock, so as to realize the correct judgment of the transmitted data and interpret the correct code stream. The time for the integrated phase-locked loop circuit to realize the stable output of clock recovery is generally in the order of milliseconds to microseconds, which is mainly determined by the response time of the phase-locked loop. Therefore, for high-speed opt...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/00H03L7/085
Inventor 潘素敏易河清肖鹏程陈兵
Owner 上海博为光电科技有限公司
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