Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Chip mac layer verification system and method

A chip and verification device technology, applied in the field of chip verification, can solve problems such as pause frame verification omission, chip abnormality, low accuracy rate, etc., and achieve the effect of improving verification accuracy

Pending Publication Date: 2022-08-05
SUZHOU CENTEC COMM CO LTD
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The verification of the mac layer in the above method will lack the coverage of the coupling situation of the pause frame and other various message information combinations, resulting in the omission of the verification of the mac layer sending / receiving the pause frame, thus causing the verification of the mac layer When the accuracy rate is low, the final chip used is abnormal

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Chip mac layer verification system and method
  • Chip mac layer verification system and method
  • Chip mac layer verification system and method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0048]In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. The components of the embodiments of the invention generally described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations.

[0049] Thus, the following detailed description of the embodiments of the invention provided in the accompanying drawings are not intended to limit the scope of the invention as claimed, but are merely representative of selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary sk...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The embodiment of the invention provides a chip mac layer verification system and method, and the system comprises the steps: a receiving side of a to-be-detected mac layer is used for receiving a first data packet sent by a receiving side of a pause frame sender, and changing the sending information of the sending message information of a target interface of a sending side of the to-be-detected mac layer based on the first data packet; the receiving side of the pause frame capturing device is used for capturing frame information of a first pause frame and sending information of a target interface of the sending side of the mac layer to be detected; and the verification device is used for verifying the receiving side of the to-be-detected mac layer based on the frame information and the sending information of the target interface of the sending side of the to-be-detected mac layer. Through the mode, the verification accuracy of the mac layer of the chip is improved.

Description

technical field [0001] The present invention relates to the technical field of chip verification, and in particular, to a chip mac layer verification system and method. Background technique [0002] In the mac layer of the Ethernet, in addition to sending and receiving general message information, it also needs to send and receive pause frames according to the IEEE802.3 protocol standard. The mac layer of the Ethernet makes corresponding behavioral responses based on the sent and received pause frames. [0003] At present, the verification method for the mac layer of the chip is only to send a pause frame to the mac layer, and obtain the response results of the receiving side and the transmitting side of the mac layer to the received pause frame, and verify the mac layer based on the response results. [0004] The verification of the mac layer in the above method will lack the coverage of the coupling situation such as the combination of the pause frame and various other mes...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H04L9/40H04L69/323
CPCH04L63/0876H04L69/323
Inventor 唐飞丁兴仪
Owner SUZHOU CENTEC COMM CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com