Wafer alignment method and system, computer readable storage medium and processor

A technology for aligning systems and wafers, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of poor stability of Cu interconnection process and wafer position offset, etc., to improve step coverage and uniformity performance, and the effect of improving stability

Pending Publication Date: 2021-11-30
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Embodiments of the present invention provide a wafer alignment method, system, computer-readable storage medium, and processor, so as to at least solve the technical problem of poor stability of the Cu interconnection process caused by the offset of the wafer position in the related art

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  • Wafer alignment method and system, computer readable storage medium and processor
  • Wafer alignment method and system, computer readable storage medium and processor
  • Wafer alignment method and system, computer readable storage medium and processor

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Embodiment Construction

[0027] In order to enable those skilled in the art to better understand the solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only It is an embodiment of a part of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0028] It should be noted that the terms "first" and "second" in the description and claims of the present invention and the above drawings are used to distinguish similar objects, but not necessarily used to describe a specific sequence or sequence. It is to be understood that the data so used are interchangeable under appropriate ...

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Abstract

The invention discloses a wafer alignment method and system, a computer readable storage medium and a processor. The method comprises the following steps: acquiring position offset information between a wafer and a bearing assembly; according to the position offset information, determining motion control parameters of a supporting assembly, wherein the supporting assembly is used for separating the wafer from the bearing assembly under a preset condition; and controlling the supporting assembly to move based on the motion control parameter, and driving the wafer to move by the support assembly so as to align the wafer with the bearing assembly. According to the invention, the technical problem of low stability of the Cu interconnection process caused by the deviation of the wafer position in the prior art is solved.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a wafer alignment method, system, computer readable storage medium and processor. Background technique [0002] In the Cu interconnection process of the wafer, the wafer is flattened and fixed on the surface of the E-chuck (Electrostatic Adsorption Chuck) by electrostatic adsorption. In order to meet the demand for filling the space towards a small size, a high-temperature reflow process is introduced during the deposition of the seed layer , In the high temperature reflow process, it is necessary to adsorb and release the wafer several times. Since the static electricity of the E-chuck is not completely eliminated when the adsorption is released, it causes incomplete release of the wafer, incomplete release of the wafer and the incomplete release of the wafer. The difference in the warpage of the circle itself will cause a positional shift between the wafer and th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/68H01L21/67
CPCH01L21/681H01L21/67294H01L21/67265
Inventor 蔡志勇张育龙武素衡熊少游
Owner YANGTZE MEMORY TECH CO LTD
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