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Analog-to-digital converter circuit

A converter circuit and analog-to-digital converter technology, applied in the field of analog-to-digital conversion, can solve problems such as short delay and stability

Pending Publication Date: 2021-10-15
TELEFON AB LM ERICSSON (PUBL)
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, all delays in the loop must be kept short to avoid stability issues

Method used

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  • Analog-to-digital converter circuit
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Embodiment Construction

[0031] figure 1 A communication environment is shown in which embodiments of the invention may be employed. A wireless communication device 1 (or wireless device 1 for short) of the cellular communication system performs wireless communication with a radio base station 2 of the cellular communication system. The wireless device 1 may generally be referred to as user equipment (UE). wireless device 1 in figure 1 is shown as a mobile phone, but could be any kind of device with cellular communication capabilities, such as a tablet or laptop computer, a machine type communication (MTC) device, and the like. Also, a cellular communication system is used as an example in this disclosure. However, embodiments of the present invention may also be applicable to other types of systems, such as but not limited to WiFi systems.

[0032] The radio base station 2 and the wireless device 1 are examples of communication devices collectively referred to in this disclosure. Embodiments are...

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PUM

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Abstract

An ADC circuit (50) is disclosed. The ADC circuit (50) comprises a global input configured to receive an input voltage (Vin) and a plurality of converter circuits (105l-105N). Each converter circuit (105j) comprises a comparator circuit (70j) having a first input connected to the global input, a second input, and an output configured to output a one-bit output signal of the comparator circuit (70j). Furthermore, each converter circuit (105j) comprises a one-bit current-output DAC (110j) having an input directly controlled from the output of the comparator circuit (70j) and an output connected to the second input of the comparator circuit (70j). The second inputs of all comparator circuits are interconnected. The ADC circuit (50) further comprises a digital output circuit (130) configured to generate an output signal z[n] of the ADC circuit (50) in response to the one-bit output signals of the comparator circuits (70j).

Description

technical field [0001] The present invention relates to analog-to-digital conversion. Background technique [0002] Wireless transceivers for 5G (fifth-generation cellular networks) and other standards have a tendency to use higher bandwidths, placing stringent requirements on analog-to-digital converters (ADCs). One way to achieve high speed is to use a flash ADC. It uses a separate comparator for each digital level of the signal, i.e., using 2 N - 1 comparator, where N is the number of bits. By executing 2 N - 1 parallel comparison, N-bit analog-to-digital conversion can be completed in a single clock cycle. The accuracy requirements of each comparator in terms of noise and offset also increase exponentially with N. Although fast, it is therefore often difficult to achieve sufficient resolution for wireless systems, and power consumption is often high. To ensure efficient use of the implemented 2 N - 1 comparator, the noise (and offset) level is designed to be signi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/04H03M3/02
CPCH03M1/04H03M3/02H03M3/30H03M1/1023H03M1/1245H03M1/361H03M1/06
Inventor H·弗雷德里克松H·斯约兰德
Owner TELEFON AB LM ERICSSON (PUBL)
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