RTL code generation method, device and electronic device for gate-level circuit

Abstract

The embodiment of the present application provides a gate-level circuit RTL code generation method, device, and electronic equipment, which belong to the field of integrated circuit technology, wherein the method includes: obtaining the RTL code of each logic element of the first gate-level circuit; The RTL codes of the logic elements are compiled separately to obtain the target view of the logic elements; according to the connection relationship between the logic elements and the target view of the logic elements, the first gate-level circuit is generated RTL code. According to the method, device, and electronic device for generating RTL codes for gate-level circuits in the embodiments of the present application, the generated RTL codes for gate-level circuits can more intuitively describe the functions of the circuits, thereby facilitating understanding of the functions of the gate-level circuits.

Description

technical field [0001] The present application belongs to the technical field of integrated circuits, and in particular relates to a method, device and electronic equipment for generating RTL codes of gate-level circuits. Background technique [0002] Integrated circuits (also known as "digital circuits" or simply "circuits") are formed by connecting logical elements through a wire network. When designing an integrated circuit, write the RTL code that describes the hardware function, and use the logic synthesis tool to obtain the gate-level netlist that implements the corresponding hardware function. Since the description form of the gate-level netlist is a structural description, or described in the form of a module instantiation statement, the complex circuit cannot intuitively describe the function of the circuit at the "gate level", and the gate-level circuit is different from the original design. RTL code is more difficult to link. Contents of the invention [0003]...

AI Technical Summary

Problems solved by technology

Since the description form of the gate-level netlist is a structural description, or described in the form of a module instantiation statement, the complex circuit cannot intuitively describe the function of the circuit at the "gate level", and the gate-level circuit is different from the original design. RTL code is more difficult to link

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