Soft error-oriented register reliability modeling and evaluation method

Abstract

The invention discloses a soft error-oriented register reliability modeling and evaluation method. The method comprises the following steps: calculating a vulnerability factor RVF and a damage rate RCR of a single register; based on a hierarchical modeling mode, establishing a reliability model ZRRM from registers with different functions to all registers of the system by using a Z language; converting the ZRRM model into a CTMC form, and establishing CTMC models for registers with different functions; calculating the instantaneous vulnerability of the registers with different functions according to the CTMC model of the registers, and evaluating the reliability of the registers with different functions; based on the relationship between the reliability evaluation result and the state of the single register, carrying out reliability evaluation on the whole system by utilizing the CTMC. According to the method, the modeling process is subjected to staged processing, the modeling process is simple and clear, the reliability of registers with different functions can be evaluated, and the reliability of the ZRRM model can be strictly analyzed and evaluated by using a model detection method.

Description

technical field [0001] The invention belongs to the field of reliability, formalized modeling and verification, in particular to a soft error-oriented register reliability modeling and evaluation method. Background technique [0002] Register (Register) is one of the components in the central processing unit (CPU), a storage unit that can be quickly accessed by the CPU. Memory usually consists of small amounts of fast storage, and some registers may be read-only or write-only due to special hardware capabilities. Computers with almost all architectures load the data in the larger memory into the registers, and use the data in the registers to perform calculations under the control of machine instructions. After the calculations are completed, the data is written back to the main memory under the control of the instructions. , the modern computer architecture often uses static or dynamic RAM as the main memory, and then accesses it through one or more levels of cache. Regis...

AI Technical Summary

Problems solved by technology

However, with the increasing complexity of embedded registers and the rapid development of register hardening technology, traditional methods are becoming more and more difficult to describe their dynamic characteristics, and it is also difficult to reflect the reliability of embedded registers and the time correlation

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