Verification method of APB-UART module based on UVM

An APB-UART and verification method technology, applied in the field of verification of protocol conversion modules, can solve the problems of incompetence for verification of complex function modules, low verification efficiency, low reusability, etc.

Pending Publication Date: 2020-11-10
UNIV OF ELECTRONIC SCI & TECH OF CHINA
View PDF5 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the above-mentioned methods all have disadvantages such as low reusability, low verification efficiency, and difficulty in complete verification, and cannot be competent for the verification of complex functional modules.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Verification method of APB-UART module based on UVM
  • Verification method of APB-UART module based on UVM
  • Verification method of APB-UART module based on UVM

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] The overall structure of this verification platform is as follows: figure 1 As shown, the specific implementation of each module is as follows.

[0020] This verification platform uses agents to drive and collect specific ports. It contains four agents in total, namely Apb_Agent, Rx_Agent, Tx_Agent and Modem_Agent. Both Rx_Agent and Tx_Agent are instantiated by Uart_Agent. As can be seen in the overall architecture diagram, different agents encapsulate the corresponding driver, monitor, and sequencer. Each agent realizes the conversion of data from transaction level to signal level through the corresponding driver component, and drives it to the relevant port of DUT; through the corresponding monitor component, it collects the relevant port signal at a specific moment, and converts it from signal level to transaction level and sends it It is used for subsequent modules; through the corresponding sequencer, the work of generating different incentives is separated, and t...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to the field of chip verification, and mainly realizes a verification method of an APBUART module based on a UVM. A verification platform constructed by the verification method comprises an agent component for realizing data interaction with different protocol ports; a scoreboard assembly used for realizing data comparison; a checker assembly used for realizing baud rate detection; ,adding a register model of an early warning mechanism andverifying the environment env component; and a coverage rate collection assembly. According to the verification method, corresponding test cases and sequences are designed according to multiple functions of the APBUART module. The verification platform can realize the input of various test excitations, has the functions of automaticresult comparison and coverage rate collection, and can quickly and completely verify the APBUART module.

Description

technical field [0001] The invention relates to the field of chip verification, in particular to a verification method of a protocol conversion module based on UVM (Universal Verification Methodology). Background technique [0002] With the continuous development of integrated circuit theory and the emergence of SoC (System On Chip) technology, designers have improved the design capabilities and efficiency of chips, which has increased the complexity and scale of chips. And because of the continuous improvement of the process and the lower and lower tolerance of the market for product defects, the losses to be borne after each tape-out failure are also increasing, which makes the verification work before tape-out very important. And gradually become an indispensable part of the chip design process. [0003] The APB (Advanced Peripheral Bus) protocol is one of the AMBA bus protocols. It has the characteristics of low power consumption and simple interconnection signals, and ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F11/22
CPCG06F11/2247G06F11/2273
Inventor 王忆文段一杰
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products