A method and apparatus for controlling erase performance

Abstract

The present invention provides a method and apparatus for controlling erasing performance. The method is applied to a NOR flash memory, and the NOR flash memory includes: an erasing cycle number detection unit, a clock frequency generator, an erasing operation state machine and an erasing storage unit, the erasing operation state machine includes: a counter, The method includes: the erasing operation state machine receives an erasing operation instruction, and performs an erasing verification operation and an erasing pressing operation according to the erasing operation instruction, and the erasing and pressing operation includes: receiving a transmission from the erasing cycle times detection unit. According to the number of cycles, the time of a single erasing and pressing operation is adjusted according to the number of cycles, and the erasing and pressing operation is completed according to the adjusted time. In the present invention, when the erasing and pressing operation is performed, the erasing operation state machine adjusts the time of a single erasing and pressing operation according to the number of cycles, completes the erasing and pressing operation, and controls the erasing verification operation and the erasing and pressing operation. Cycle cycle, improve the erase performance of NOR flash memory.

Description

technical field [0001] The present invention relates to the field of storage, and in particular, to a method and device for controlling erasing performance. Background technique [0002] At present, the NOR flash memory uses tunneling to realize the erasing operation. The research results show that the longer the voltage applied during erasing, the better the erasing effect on the memory cells of the NOR flash memory. [0003] refer to figure 1 , which shows the schematic diagram of the existing NOR flash memory erasing principle. During the erasing operation, in order to make electrons tunnel from the floating gate layer to the substrate, a negative pressure needs to be applied to the gate terminal (G), and a positive voltage must be applied to the substrate. The drain terminal (D) and the source terminal (S) are left floating. Research shows that the longer the erasing pressure is, the better the erasing effect of the memory cells to be erased in the NOR flash memory, and...

AI Technical Summary

Problems solved by technology

[0005] A method and device for controlling erasing performance provided by the present invention solves the problem that the probability of a single erasing success decreases with the increase of erasing times, but the time for a single erasing pressurization operation is fixed, and the entire The erasing operation will take longer, and even the erasing task cannot be completed in the end

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