A method, system and device for realizing 32-bit integer division with high precision

Abstract

The invention discloses a method for realizing 32-bit integer division with high precision. The method comprises the following steps that: inputting a first dividend and a first divisor into a zero judgment unit, and when the first dividend and the first divisor are not zero, allowing the zero judgment unit to output a second dividend and a second divisor; inputting the second dividend and the second divisor into a symbol extraction module, wherein the symbol extraction module outputs the symbol of a quotient, a third dividend and a third divisor; inputting the third dividend and the third divisor into a scaling module, scaling the third dividend and the third divisor, and outputting a fourth dividend, a fourth divisor, a third dividend scaling factor and a third divisor scaling factor; inputting the fourth dividend and the fourth divisor into a CORDIC iteration unit, updating the quotient and the initial value, and performing iteration; after the iteration is completed, allowing the CORDIC iteration unit to output the quotient to the result output unit, and allowing the result output unit to output the quotient and the scaling factors. The precision of the quotient is effectivelyguaranteed, the output bit width is small, the subsequent use is facilitated, and the error is smaller than one thousandth.

Description

technical field [0001] The invention belongs to the technical field of wireless communication, and in particular relates to a method, system and device for realizing 32-bit integer division with high precision. Background technique [0002] In the field of digital signal processing, 32-bit integer dividers are often used, such as in signal normalization and channel estimation. [0003] Existing division schemes often use derivative division, SRT method, addition and subtraction alternate method, CORDIC method, etc., but the operation cycle of these methods often increases a lot with the increase of the number of digits, wasting power consumption. Some of the methods require a multiplication resource device, and the multiplier consumes more resources and operation cycles. Moreover, as the data bit width increases, the middle bit width of the arithmetic unit often becomes larger and larger, occupying more storage space. In order to ensure performance, the bit width of the ou...

AI Technical Summary

Problems solved by technology

[0003] Existing division schemes often use derivative division, SRT method, addition and subtraction alternate method, CORDIC method, etc., but the operation cycle of these methods often increases a lot with the increase of the number of digits, wasting power consumption

Some of the methods require multiplication resources, and multipliers consume more resources and computing cycles

Moreover, as the data bit width increases, the middle bit width of the arithmetic unit is often larger and larger, which takes up more storage space.

In order to ensure performance, the bit width of the output result is large, and the resource overhead of subsequent addition and multiplication is relatively large.

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