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Method, device and system for eliminating narrow pulse in two-level SVPWM modulation and inverter

A narrow pulse and inverter technology, applied in the field of space vector modulation technology (SVPWM), can solve the problems of reduced bus voltage utilization, high turn-off peak voltage, output waveform distortion, etc., to improve bus voltage utilization and reduce Failure rate, the effect of reducing output harmonics

Active Publication Date: 2019-12-10
武汉理工通宇新源动力有限公司
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Problems solved by technology

However, the narrow pulse output by the SVPWM modulation strategy will cause a high turn-off peak voltage when the power device (IGBT, MOSFET, etc.) of the inverter is not turned on and then turned off, which will cause damage to the power device, and at the same time There are problems such as output waveform distortion, power device loss increase, bus voltage utilization rate reduction, etc.

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  • Method, device and system for eliminating narrow pulse in two-level SVPWM modulation and inverter
  • Method, device and system for eliminating narrow pulse in two-level SVPWM modulation and inverter

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Embodiment Construction

[0027] The present invention will be further described below in conjunction with specific examples and accompanying drawings.

[0028] Such as figure 1 and figure 2 As shown, the present invention provides a kind of method for narrow pulse elimination in two-level SVPWM modulation, comprises the following steps:

[0029] S1. A narrow pulse judgment value Dmin is preset to judge whether there are narrow pulses in the three-phase voltage duty ratios Ta, Tb, and Tc obtained by the SVPWM modulation algorithm. The narrow pulse judgment value Dmin is calculated by the following formula:

[0030] Dmin=D1+D2

[0031] In the formula, D1 is the dead time of the inverter, and D2 is the narrowest acceptable output pulse width.

[0032] S2. If there is a narrow pulse, calculate the average value Tav of the three-phase voltage duty ratios Ta, Tb, and Tc, and determine the compensation amount T0 according to the magnitude of Tav. In this embodiment, if Tav is less than 0.5, then T0=0....

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Abstract

The invention provides a method, a device and a system for eliminating a narrow pulse in two-level SVPWM modulation and an inverter. A narrow pulse determination amount Dmin is preset to judge whetherthe narrow pulse exists in three-phase voltage duty ratios Ta, Tb and Tc obtained by a SVPWM modulation algorithm. If the narrow pulse exists, a average value Tav of the three-phase voltage duty ratios Ta, Tb and Tc is calculated, and a compensation amount T0 is determined according to the Tav. The three-phase voltage duty ratios Ta, Tb and Tc are compensated, and whether the compensated three-phase voltage duty ratios Ta, Tb and Tc still have the narrow pulse is determined. If so, an over-modulation region of SVPWM is entered into, the narrow pulse is directly eliminated, and a hexagonal wave is modulated and output by using DPWM. In the method, the narrow pulse is eliminated when SVPWM modulation cannot satisfy a control requirement due to a fact that the narrow pulse is identified andjudged, and a special hardware circuit does not need to be added so that a failure rate of a power device is reduced, a bus voltage utilization rate is increased, and an output harmonic wave is reduced.

Description

technical field [0001] The invention belongs to the field of space vector modulation technology (SVPWM), and in particular relates to a method, device, system and inverter for eliminating narrow pulses in two-level SVPWM modulation. Background technique [0002] At present, the space vector modulation technology is widely used in the voltage source inverter, its switching frequency is low, and it is easy to implement digitally. However, the narrow pulses output by the SVPWM modulation strategy will cause a high turn-off peak voltage when the power devices (IGBT, MOSFET, etc.) of the inverter are not turned on and then turned off, which will cause damage to the power devices, and at the same time There are problems such as output waveform distortion, power device loss increase, and bus voltage utilization rate decrease. Contents of the invention [0003] The technical problem to be solved by the present invention is to provide a method, device, system and inverter for elim...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H02M7/48H02M1/32H02M1/08H02M1/12
CPCH02M1/08H02M1/12H02M1/32H02M7/48H02M1/0038
Inventor 李浩楚育博彭浩
Owner 武汉理工通宇新源动力有限公司
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