DQS position adjusting method and device

Abstract

The invention discloses a data strobe signal DQS position adjusting method and device. The method comprises the steps: acquiring the margin effective width of all data signals DQ on a transfer bus; determining a left boundary based on the margin effective width, and determining a right boundary, wherein the left boundary is the maximum value of the margin effective width minimum values of all DQs,and the right boundary is the minimum value of the corresponding all margin effective width maximum values of all DQs aligned with the left boundary; calculating a first center position according tothe left boundary and the right boundary, wherein the first center position is the center of the minimum margin effective width after all DQs are aligned during read data training; and adjusting a delay line DL of the DQS to the first center position. The method enables the margin of the setup time and the holding time of the data signal obtained by DQS sampling at the first central position to bemaximum, thereby avoiding the error code when the data is read and written, and improving the reliability of the data read and write operation.

Description

technical field [0001] The present application relates to the technical field of communications, and in particular to a DQS position adjustment method and device. Background technique [0002] With the continuous development of the ICT (Information Communications Technology, information, communication and technology) industry, customers require fast response and low latency for the storage of massive data, that is, the number of read and write (I / O) operations per second for the storage system (Input / Output Operations Per Second, IOPS) performance requirements are higher. In addition, with the rapid development of flash memory technology, the application of flash memory has become a trend. In order to meet the high performance requirements of IOPS, one way is to consider improving the non-volatile flash interface (Nand Flash Interface, NFI) between the storage controller and the new flash media. Bus speed, because the NFI bus speed is a key point for improving the performan...

AI Technical Summary

Problems solved by technology

[0004] Taking a typical storage system as an example, such as 2.5-inch solid-state drives, standard cards, and other types of SSDs and other large-capacity scenarios, due to the influence of wiring topology, wiring length, and wiring impedance, the data received by the receiving end (corresponding to the destination of signal transmission) The effective width and phase of the signal will change greatly, resulting in a decrease in the effective width of the data signal (Data signal, DQ). Insufficient time margin, which leads to bit errors when reading and writing data, resulting in data loss

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