Method for measuring stability of phase-locked loop in central processing unit via frequency meter

Abstract

The invention provides a method for measuring the stability of a phase-locked loop (PLL) in a central processing unit via a frequency meter. The method comprises the steps as follows: a central processing unit outputs an oscillation excitation signal to a crystal circuit; the crystal circuit generates a clock signal according to the oscillation excitation signal; an internal loop outputs a clock signal that does not pass through the phase-locked loop via an output port on the central processing unit; the frequency meter is used for receiving the clock signal which does not pass through the phase-locked loop and performing a clock precision test to acquire a first test result; the internal loop outputs a clock signal that passes through the phase-locked loop; the frequency meter is used forreceiving the clock signal that passes through the phase-locked loop and performing the clock precision test to acquire a second test result; and a first test result and a second test result are compared according to a preset strategy to acquire a stability result of the phase-locked loop. The method provided by the invention has the beneficial effects that an expensive oscilloscope does not needto be purchased, the operation is simple, the affect of crystals can be avoided, and the accurate precision of the PLL can be measured.

Description

technical field [0001] The invention relates to the communication field, in particular to a method for measuring the stability of a phase-locked loop inside a central processing unit through a frequency meter. Background technique [0002] Phase-locked loop (Phase Locked Loop, PLL) plays a pivotal role in the central processing unit (Central Processing Unit). The stability of the PLL determines the performance of the CPU and the stability of the system. However, the PLL is related to chip design. During use, it is necessary to judge the performance and stability of the PLL. [0003] Currently, there are two solutions in the industry: [0004] 1) Use an oscilloscope to measure the jitter of the output signal to reflect the stability of the PLL, but an oscilloscope with a high bandwidth and an active probe are required; [0005] 2) Do not measure, directly measure the stability of the system; [0006] The disadvantage of using an oscilloscope to measure is that an expensive...

AI Technical Summary

Problems solved by technology

[0006] The disadvantage of using an oscilloscope to measure is that an expensive oscilloscope is required for analysis. Instead of measuring the PLL, the stability of the system is directly measured, and the stability of the PLL is deduced by judging the stability of the system. The disadvantage of the evaluation is that the evaluation result is not accurate.

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