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Chip and method for reusing pins of chip

A pin and chip technology, applied in the field of chip and pin reuse, can solve problems such as unfavorable chip application innovation, difficult to meet the special needs of applications, product application system cloning, etc., to avoid product application defects and broaden product applications. Scope, the effect of protecting the product application system

Inactive Publication Date: 2018-08-10
SHENZHEN STATE MICRO TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] 1. The multiplexing relationship of the chip pins is determined according to the expected chip application scenarios during the chip design stage. The chip can only be applied to typical expected products, and it is difficult to meet the special needs of some complex and unexpected product applications. The product application scope of the chip is limited, which is not conducive to the product application innovation of the chip;
[0006] 2. In the chip pin multiplexing method of the prior art, if the multiplexing relationship of the chip pins is not well planned in the chip design stage, then the actual chip may have functional application defects;
[0007] 3. The multiplexing relationship of the chip pins is definite, the pin functions of the chip and the PCB board of the product can be easily analyzed, and the product application system of the chip has the risk of being cloned

Method used

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  • Chip and method for reusing pins of chip
  • Chip and method for reusing pins of chip
  • Chip and method for reusing pins of chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0028] Such as figure 1 As shown, in this embodiment, a chip 10 is provided, which includes a plurality of internal function interfaces 101 , a plurality of common chip pins 102 , a pin redefinition module 103 and a non-volatile memory 104 . The internal function interface 101 is an internal interface for input and output signals of internal circuits of the chip. The general pin 102 of the chip is used to provide an external interface for input and output signals of the internal circuit of the chip. The number of general-purpose pins 102 of the chip is less than the number of internal functional interfaces 101 of the chip. The multiple internal function interfaces 101 are connected to the multiple common chip pins 102 through the pin redefinition module 103 . The pin redefinition module 103 is implemented by a programmable circuit, and is used for mapping the multiple internal function interfaces 101 to the multiple chip common pins 102 according to a preset pin redefinition...

Embodiment 2

[0034] Such as Figure 4 As shown, in this embodiment, a chip 40 is provided, which includes a plurality of internal function interfaces 401 , a plurality of common chip pins 402 and a pin redefinition module 403 . The internal function interface 401 is an internal interface for input and output signals of internal circuits of the chip. The common pin 402 of the chip is used to provide an external interface for input and output signals of the internal circuit of the chip. A first part of the multiple internal function interfaces 401 is connected to a first part of the multiple chip common pins 402 in a one-to-one correspondence to form pins with fixed functions. A second part of the multiple internal function interfaces 401 is connected to a second part of the multiple chip common pins 402 through the pin redefinition module 403 .

[0035] The pin redefinition module 403 is implemented by a programmable circuit, and is used to map the second part of the multiple internal fun...

Embodiment 3

[0039] In this embodiment, a chip pin multiplexing method is also provided, which includes:

[0040] A pin redefinition module is set between the internal function interface of the chip and the external common pins of the chip, and the pin redefinition module maps the internal function interface to the Chip general pin. The pin redefinition module is realized by a programmable circuit, preferably, by an eFPGA.

[0041] In summary, the present invention integrates a pin redefinition module in the chip. The circuit of the pin redefinition module can be reprogrammed, and different chip pin redefinition circuits can be realized according to the configuration files loaded. The functional interface of the module can be arbitrarily connected to each general-purpose pin of the chip through pin redefinition, realizing the arbitrary function multiplexing of each pin, which can not only meet the application requirements of typical products, but also meet the complex special products Ap...

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PUM

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Abstract

The invention discloses a chip and a method for reusing pins of the chip. The chip comprises a plurality of internal function interfaces, a plurality of chip general pins and a pin re-definition module, wherein the plurality of internal function interfaces are connected with the plurality of chip general pins through the pin re-definition module; and the pin re-definition module is realized by a programmable circuit and is used for mapping the plurality of internal function interfaces to the plurality of chip general pins according to a preset pin re-definition configuration file. The chip disclosed by the invention can be adapted to multiple pin reusing demands.

Description

technical field [0001] The invention relates to the field of chips, in particular to a chip and a pin multiplexing method thereof. Background technique [0002] With the rapid development of integrated circuit technology, the integration level of the chip is getting higher and higher, and the functions of the chip are becoming more and more complex, followed by more and more pins of the chip. If independent pins are allocated for all functional interfaces supported by the chip during chip design, the area of ​​the chip will be relatively large. In addition, the huge number of chip pins is not conducive to the product application development of the chip. Chips of the present technology usually use multiple functional interfaces to share a set of pins, that is, a single chip pin can be multiplexed into multiple functional interfaces to reduce the number of chip pins. [0003] The chip pin multiplexing method in the prior art is to plan out the functional interface to be multi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/38
CPCG06F13/385
Inventor 王良清李亚明
Owner SHENZHEN STATE MICRO TECH CO LTD
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