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Image batch-processing method, device thereof and electronic equipment

A batch processing and image technology, applied in the field of image processing, can solve the problems of low efficiency of image processing, no solution proposed, low efficiency of image processing of capture machines, etc., and achieve the effect of improving image processing efficiency

Active Publication Date: 2018-07-17
AXERA SEMICON (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the recognition neural network in the capture machine only processes one small image at a time, and the capture chip may extract a large number of small images to be processed from the collected images, there is no doubt that this pair of multiple The method of processing small images one by one will lead to low image processing efficiency of the capture machine
[0004] Aiming at the relatively inefficient image processing methods in the prior art, no effective solution has been proposed yet

Method used

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  • Image batch-processing method, device thereof and electronic equipment
  • Image batch-processing method, device thereof and electronic equipment
  • Image batch-processing method, device thereof and electronic equipment

Examples

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Embodiment 1

[0034] First, refer to figure 1 An example electronic device 100 for implementing the image batch processing method, device and electronic device according to the embodiments of the present invention will be described.

[0035] Such as figure 1 Shown is a schematic structural diagram of an electronic device. The electronic device 100 includes one or more processors 102, one or more storage devices 104, an input device 106, an output device 108, and an image acquisition device 110. These components pass through a bus system 112 and / or other forms of connection mechanisms (not shown). It should be noted that figure 1 The components and structure of the electronic device 100 shown are only exemplary, not limiting, and the electronic device may also have other components and structures as required.

[0036] The processor 102 can be implemented in at least one hardware form of a digital signal processor (DSP), a field programmable gate array (FPGA), and a programmable logic arra...

Embodiment 2

[0043] refer to figure 2 A flow chart of an image batch processing method shown specifically includes the following steps:

[0044] Step S202, acquiring multiple first images to be processed. In one embodiment, each first image has the same size and includes j*k pixels, j represents the number of pixels in the horizontal direction of the first image, and k represents the number of pixels in the vertical direction of the first image. The content contained in each first image may be the same or different.

[0045] Step S204, performing splicing processing on multiple first images to form a second image. The image stitching in this embodiment is to stitch images in the airspace (also called image stitching in the airspace), and images in the airspace are mostly two-dimensional images. In this embodiment, the first image is a small image, and the second image is a large image formed by splicing multiple small images. In a specific implementation, the small image is rectangula...

specific Embodiment approach

[0060] If invalid pixels are introduced at the edges of two adjacent small images during the splicing process, this embodiment provides a specific implementation method for processing the second image to obtain a processing result, including the following steps:

[0061] (1) Perform convolution processing on the second image to obtain a convolution result; wherein, the convolution result is a result matrix composed of valid convolution values ​​and invalid convolution values. see Figure 5 A schematic diagram of convolution processing is shown, and the actual process of convolution processing is the convolution sum of n*n pixel matrices and weight matrices (convolution kernels) in the image. in, Figure 5 The pixel matrix in simply shows a partial area in the second image, and a small square in the pixel matrix represents a pixel. Figure 5 It is assumed that a small image has 3*2 pixels, which are p11, p12, p13, p21, p22, p23 respectively; taking 3*3 convolution as an examp...

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Abstract

The invention provides an image batch-processing method, a device thereof and electronic equipment. The image batch-processing method, the device thereof and the electronic equipment relate to the field of image processing technology. The method is executed by means of a neural network. The image batch-processing method comprises the steps of acquiring a plurality of to-be-processed first images;performing splicing processing on the plurality of first images, thereby forming a second image; and processing a second image for obtaining a processing result. The image batch-processing method, thedevice thereof and the electronic equipment can effectively improve image processing efficiency.

Description

technical field [0001] The present invention relates to the technical field of image processing, in particular to an image batch processing method, device and electronic equipment. Background technique [0002] In intelligent fields such as face recognition and target detection, neural networks have been widely used due to their powerful computing capabilities. For example, neural networks can better recognize and process images. Neural network models are used to process images in image processing devices such as capture cameras and face recognition devices. [0003] Usually, the neural network can only process one image at a time, and obtain the processing result corresponding to the image, but this method will affect the processing efficiency of the image processing device to a certain extent. Taking the capture machine as an example, the capture machine can use the capture chip to extract a small image containing only the target object (such as a human face) from the col...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T3/40
CPCG06T3/4038G06T3/4046
Inventor 梁喆朱雨
Owner AXERA SEMICON (SHANGHAI) CO LTD
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