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Anti-attack arbitration device

An arbiter and anti-attack technology, applied in the protection of internal/peripheral computer components, etc., can solve the problems of leakage of cryptographic calculation results, being returned to other responses, and failure to return, etc., to achieve high security and reduce the risk of being leaked Effect

Active Publication Date: 2016-04-20
SHENZHEN STATE MICRO TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In some security-related applications, the shared resource module 103 may involve certain cryptographic algorithms, such as Advanced Encryption Standard (AES), and at this time it may be required that the response to request x can only be returned to response x, and cannot be returned to other than response x, then once the demultiplexer 104 is hacked, the response to request x may be returned to other responses, and the result of the cryptographic operation may be leaked.

Method used

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Examples

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Embodiment Construction

[0015] like figure 2 As shown, the present invention proposes a new arbiter structure on the basis of the prior art, and the arbiter includes a multiplexer 102, a shared resource module 103, a demultiplexer 104, a scrambler 107 and a descrambler 108 .

[0016] The multiplexer 102 is used to receive multiple requests for data, and select one of the multiple requests for data to output according to an arbitration algorithm. The shared resource module 103 is used to receive the request data selected and output by the multiplexer, start the calculation in the request response period, and output the calculation result in the output response period. Generally, the shared resource module 103 is suitable for some resource-intensive modules or algorithm modules that perform complex operations. Resource-intensive modules such as one-time programmable memory (OneTime Programmable, OTP): Assuming that there are multiple requests to read the OTP, the request data is the read address, an...

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PUM

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Abstract

The invention discloses an anti-attack arbitration device comprising a multiplexer, a sharing resource module and a demultiplexing device and further comprises a scrambler and descramblers. The scrambler is added to conduct xor operation before the demultiplexer to scramble original response data; and a plurality of descramblers are employed to increase xor operation after the demultiplexing device to demultiplex for the scrambled response data. When a request response and an output response of the arbitration device are not finished in the same clock period, a scrambling register has to be added to save request data responded during the request response period and then finish xor operation with the original response data during the output response period; and safety performance of the arbitration device can be improved and anti-attack property can be enhanced.

Description

technical field [0001] The invention relates to a computer processor, in particular to an attack-resistant arbiter. Background technique [0002] Existing arbitrators are implemented based on the selection of multiple possible input requests and one output response. If there is only one input request, the output response must be the corresponding input; if there are multiple input requests at the same time, the selection of the output response depends on a certain algorithm function. [0003] figure 1 It is a schematic diagram of the realization structure of the existing arbitrator. Among them, request data 1, request data 2, ..., request data n101 form n input requests of the arbiter, and response data 1, response data 2, ..., response data n105 form n output responses of the arbiter, multiplexed The demultiplexer 102 is responsible for selecting a certain request as the input of the shared resource module 103 according to the arbitration algorithm in the request respons...

Claims

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Application Information

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IPC IPC(8): G06F21/72
CPCG06F21/72
Inventor 赵尧王良清陶玉茂
Owner SHENZHEN STATE MICRO TECH CO LTD
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