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A Design Method of Universal Reversible Sequential Machine

A design method and technology of sequential machines, which are applied in computing, special data processing applications, instruments, etc., can solve problems such as difficulty in expansion, inability to perform calculations with reversible sequential machines, and inability to maintain state unchanged.

Active Publication Date: 2019-01-22
重庆锦禹云能源科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the structure of the reversible sequential machine is simple and intuitive, and it can also run under asynchronous conditions, it has several disadvantages: there are only two states inside the reversible sequential machine, and in a calculation process, Its state must be transferred from one state to another state, and the state cannot be kept unchanged; when the state is greater than 2, the reversible sequential machine will not be able to perform calculations, and it will be difficult to expand

Method used

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  • A Design Method of Universal Reversible Sequential Machine
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  • A Design Method of Universal Reversible Sequential Machine

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Embodiment Construction

[0036] The present invention will be further described below in conjunction with accompanying drawing and specific embodiment:

[0037] The invention aims to propose a method for constructing a general reversible sequential machine by using reversible logic elements. The purpose of the present invention is not to invent new reversible logic elements or new reversible sequential machine definitions. First, we introduce reversible logic elements for constructing reversible sequential machines. Next, we introduce the reversible sequential machine constructed at last. Finally, we introduce methods for constructing reversible sequential machines using reversible logic elements.

[0038] Introduction to reversible logic elements:

[0039] A reversible logic element can be regarded as a module containing finite input lines and output lines, and the communication between reversible logic elements is completed by exchanging signals through the interconnected network between them. S...

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Abstract

The invention discloses a design method of a universal reversible sequential machine. The method comprises the following steps: utilizing a reversible logic element CDE to form S-CDE; utilizing logic elements RT and IRT and a novel invented S-CDE to form S-RD and S-IRD; utilizing logic elements S-RD and S-IRD to form an m-signal s-state transformer and an m-signal s-state inverse transformer; utilizing the m-signal s-state transformer, the m-signal s -state inverse transformer and the S-CDE to form the reversible sequential machine. The reversible sequential machine designed according to the method can have any s kinds of internal states, can be changed between any two states, and can be kept in a certain state. The reversible sequential machine designed according to the method can be a completely universal m-signal s-state reversible sequential machine, further can be a reversible sequential machine module with the universality, can be embodied to form a specific computing module, and further is completely suitable for the situation that the requirement internal state is greater than 2.

Description

Technical field: [0001] The invention relates to a design method of a universal reversible sequential machine. Background technique: [0002] A general reversible computer model capable of reversible computing tasks has been proposed by Morita (KenichiMorita, 'A Simple Universal Logic Element and Cellular Automata for Reversible Computing' MCU 2001, LNCS 2055, pp.102-113, 2001). Morita proposed a reversible logic element called RotaryElement (RE), and proved that any reversible Turing machine (Turing machine is the prototype of modern electronic computers) can be constructed by RE interconnection. At any one time there is only one physical signal moving throughout the RE network described by Morita, so delays in REs or on any connection will not affect the correctness of the calculation. The reversible logic circuit constructed by RE will be able to run completely asynchronously without clock. Jia Lee (Lee, J. "An asynchronous cellular automaton implementing 2-state 2-inpu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 李佳何泰然陈荟慧朱礼伟杨瑞龙
Owner 重庆锦禹云能源科技有限公司
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