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Multi-core DMA (direct memory access) subsection data transmission method used for GPDSP and adopting host counting

A segmented data and transmission method technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of limited data transmission efficiency, small bit width, calculation accuracy and insufficient addressing space, and achieve effective perception of memory access characteristics, Effect of load reduction and on-chip network load reduction

Active Publication Date: 2015-06-03
NAT UNIV OF DEFENSE TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] General scientific computing requires high-performance DSP, but traditional DSP has the following disadvantages when used in scientific computing: 1) The bit width is small, which makes the calculation accuracy and addressing space insufficient
The data exchange of multi-core chips needs to be transmitted through the on-chip network. Excessively high on-chip network load will limit the data transmission efficiency. Efficient multi-core DMA design must reduce the load on the on-chip network

Method used

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  • Multi-core DMA (direct memory access) subsection data transmission method used for GPDSP and adopting host counting
  • Multi-core DMA (direct memory access) subsection data transmission method used for GPDSP and adopting host counting
  • Multi-core DMA (direct memory access) subsection data transmission method used for GPDSP and adopting host counting

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Embodiment Construction

[0038] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0039] Such as figure 1 Shown is a schematic diagram of the GPDSP architecture of the method of the present invention in a specific application example. The multi-core GPDSP processor is composed of DSP nodes, on-chip network and DDR3SDRAM outside the core. Each DSP node includes a DSP core, and the network-on-chip implements data communication between each DSP node and between the DSP node and an external storage unit. Such as figure 2 Shown is a schematic diagram of the location of the DMA in the GPDSP calculation kernel in this embodiment. DMA is connected with components such as peripheral hardware configuration bus (PBUS), vector memory (Vector Memory, VM) and scalar memory (Scalar Memory, SM) in the DSP core. Among them, the scalar processing unit SPU configures transmission parameters for the DMA unit through the periphera...

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Abstract

The invention discloses a multi-core DMA (direct memory access) subsection data transmission method used for GPDSP and adopting host counting. The multi-core DMA subsection data transmission method includes that host DMA starts and generates a subsection data transmission request according to configuration parameters, and a return data selection vector marking a return data target node is carried in a subsection data transmission reading request sent out by the host DMA each time, each bit of the return data selection vector indicates whether a corresponding core is a target node reading return data ore not; when data corresponding to the reading request are returned, an on-chip network distributes the data to corresponding DMA according to return data selection vector; the host DMA counts transmission data; after counting is completed, the host DMA sends signals for emptying receiving cache to all slave DMA taking part in transmission service; after the slave DMA empties the receiving cache, data transmission service is completed. The multi-core DMA subsection data transmission method has the advantages of simple principle, convenience in operation, configuration flexibility, high memory access efficiency and the like.

Description

technical field [0001] The present invention mainly relates to the field of General Purpose Digital Signal Processor (GPDSP), in particular to a DMA segmented data transmission method using host counting. Background technique [0002] Digital signal processor (Digital Signal Processor, DSP) as a typical embedded microprocessor is widely used in embedded systems. , has brought great opportunities to the development of signal processing, and its application fields have expanded to all aspects of military and economic development. In the application fields of modern communication, image processing and radar signal processing, as the amount of data processing increases, the requirements for calculation accuracy and real-time performance increase, and it is usually necessary to use a higher-performance microprocessor for processing. [0003] Different from the central processing unit CPU, DSP has the following characteristics: 1) Strong computing power, focusing on real-time com...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/32
Inventor 马胜杨柳陈书明万江华郭阳刘宗林孙书为刘仲雷元武刘胜王耀华王占立田玉恒胡月安丁一博
Owner NAT UNIV OF DEFENSE TECH
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