Cached data disk brushing method and device
A technology of caching data and flashing disks, applied in the storage field, can solve the problems of low efficiency of flashing disks of controllers
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Embodiment 2
[0094] Optionally, on the basis of Embodiment 1 of the controller of the present invention, the read request sending module 601 is further configured to: select the M data blocks to be brushed from all dirty data blocks according to the LBA of the current disk brushing operation. Dirty data blocks, wherein the M LBAs respectively corresponding to the M dirty data blocks to be flashed are larger than the LBAs of the current flashing operation.
[0095] Optionally, the read request sending module 601 is specifically configured to: put each dirty data block into the first queue or the second queue according to the LBA of the current disk brushing operation and the LBA of each dirty data block , the LBA of the dirty data blocks in the first queue is greater than the LBA of the current disk brushing operation, and the LBA of the dirty data blocks in the second queue is smaller than the LBA of the current disk brushing operation; from the first Select the M dirty data blocks to be f...
Embodiment 3
[0099] Optionally, on the basis of the second embodiment of the controller of the present invention, the read request sending module 601 is further configured to: according to the selected LBAs of the M dirty data blocks to be flashed, send the M pending The dirty data blocks of the LBA in the dirty data blocks of the flash disk are merged to obtain the combined dirty data blocks to be brushed; correspondingly, the read request sending module 602 is specifically used for: sending cached data reads to the SSD A fetch request, the cache data read request includes the identifier of the merged dirty data block to be flushed.
[0100] The controller of this embodiment can be used to execute Figure 4 The implementation principles and technical effects of the technical solutions of the shown method embodiments are similar and will not be repeated here.
[0101] Figure 7 It is a structural schematic diagram of the fourth embodiment of the controller of the present invention, as ...
Embodiment 5
[0104] Optionally, on the basis of the fourth embodiment of the controller of the present invention, the processor 703 is further configured to: select the M dirty data blocks to be flashed from all dirty data blocks according to the LBA of the current flashing operation, Wherein, the M LBAs respectively corresponding to the M dirty data blocks to be flashed are larger than the LBAs of the current flashing operation.
[0105] Optionally, the processor 703 is specifically configured to: put each dirty data block into the first queue or the second queue according to the LBA of the current disk brushing operation and the LBA of each dirty data block, the The LBA of the dirty data block in the first queue is greater than the LBA of the current brushing operation, and the LBA of the dirty data block in the second queue is smaller than the LBA of the current brushing operation; select from the first queue Dirty data blocks of the M disks to be flushed.
[0106] Further optionally, ...
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