Encoding/decoding storage system with scalable input bit width

Abstract

The invention provides an encoding/decoding storage system with scalable input bit width. The encoding/decoding storage system comprises a read and write control circuit, a memorizer, an encoding circuit, a data cache device, a first-level address buffer, a second-level address buffer, first-level write enable buffer, a second-level write enable buffer and a control circuit, wherein the first-level address buffer is cascaded with the second-level address buffer; the first-level write enable buffer is cascaded with the second-level write enable buffer. According to the encoding/decoding storage system, a cache encoding/decoding mechanism is adopted, so that interactive storage between storage array and the buffers can be realized; when the bit width of the data which needs to be written in and externally provided can not meet the requirement on the memorizer, namely, part of coded data comes from the external input, and the other part of the coded data comes from the storage array, accurate encoding and decoding can be realized; furthermore, the error correcting capabilities are consistent under the condition of different bit widths, so that normal write-in and read-out operation can be carried out on the storage array.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a coding / coding / decoding storage system with scalable input bit width. Background technique [0002] Memory is an important part of an electronic system, and its core is an array of memory cells for storing data or instructions. As semiconductor memory is used more and more widely, the application requirements of its internal data encoding are also increasingly diversified. For example, in order to improve reliability and yield, there is a need for fault-tolerant codec, while multimedia data storage has a need for compression codec. [0003] The encoding and decoding of the memory is defined as follows: the encoding of the memory is a mechanism that encodes the input raw data and then writes it into the storage array. Memory decoding is a mechanism for decoding and outputting data in a memory array. In the article "A survey of memory error correcting techniques for...

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Problems solved by technology

[0008] (1) For the same memory, the encoding bit width is required to be fixed, that is, all the data of the encoded byte of the storage array unit must be obtained before encoding can be performed to obtain the check digit, and the storage of the encoded data is completed, that is, the external data provides When the written data is less than the bit width required by the memory, the encoding cannot be realized, and the operation of correctly writing the array cannot be performed;

[0009] (2) In the hardware implementation of the existing memory encoding and decoding listed above, its encoding circuit has a greater impact on the input setup time, resulting in the deterioration of the circuit timing relationship

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