A realization method of self-erasable fpga configuration module
A technology for configuration modules and implementation methods, applied in information storage, static memory, instruments, etc., can solve the problems that the digital system cannot be completed by itself, FPGA and PROM cannot work, and cannot provide protection, etc. The implementation method is simple, convenient, and guaranteed Normal work, avoiding the effect of accidental erase operation
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[0035] Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:
[0036] In order to meet the requirements of technical confidentiality, the digital system needs to erase the configuration information of the FPGA to avoid obtaining relevant technical information through the configuration information. For digital systems designed based on FPGA and PROM, due to the storage characteristics of FPGA, the configuration information on it will be lost after power off, so it is only necessary to erase the configuration information on the PROM. The access, programming and erasing of PROM can be realized through JTAG. The present invention designs a self-erasable FPGA configuration module, which simulates JTAG to issue erasing instructions to the PROM by generating relevant signals through the FPGA, thereby completing the self-erasing operation.
[0037] Such as figure 1 Shown is the schematic diagram of the FPGA confi...
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