Low delay filter design method for sampling rate conversion in electronic transformer

A technology for designing electronic transformers and filters, which is applied in the fields of instruments, computing, and electrical digital data processing, etc., and can solve the problems of large group delay of digital low-pass FIR filters, etc.

Inactive Publication Date: 2013-08-14
句容建中电气有限公司 +1
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Problems solved by technology

[0006] Purpose of the invention: In view of the above problems, the present invention provides a low-delay filter design method for sampling rate con

Method used

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  • Low delay filter design method for sampling rate conversion in electronic transformer
  • Low delay filter design method for sampling rate conversion in electronic transformer
  • Low delay filter design method for sampling rate conversion in electronic transformer

Examples

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Embodiment

[0148] Perform simulation analysis of various situations on a 500kV two-turn transformer, and the system model is as Figure 5 As shown, the line length is 330km, the transformer adopts Yn / D-11 wiring, the transformation ratio is 500 / 13.8kV, the angle of rotation is the phase current differential mode of subtracting zero sequence, and the angle of the star side to the triangle side is adopted.

[0149] The IEC60044-8 standard stipulates that the rated sampling frequency of ECT can be any of 20 times, 48 ​​times, and 80 times the power frequency. In order to make the sampling frequency of the current sampling values ​​of each branch consistent, the corresponding decimation factor and interpolation can be determined Factor, its structure is like Image 6 Shown. Therefore, the designed low-pass filter may work at two frequencies, namely 4kHz and 12kHz.

[0150] ECT1 and ECT2 are electronic current transformers respectively installed at the head and end of the transformer to provide sa...

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Abstract

The invention discloses a low delay filter design method for sampling rate conversion in an electronic transformer. The method comprises the steps of first adopting cascade connection of an interpolator and an extractor to achieve conversion of random fraction ratio sampling frequency, enabling an anti-image filter in the interpolator and an anti-aliasing filter in the extractor to be combined into a low pass filter; then adopting a mean square error minimization standard to solve a coefficient vector of the filter, enabling a filter transmission band amplitude and a stop band amplitude to serve as constraint conditions, and enabling mean square error minimization to serve as an optimized target; and finally enabling a solving process of the filter coefficient vector based on constraint least square method design to be converted into solving of a positive definite quadratic programming problem so that the filter coefficient vector can be obtained by direct solving. According to the method, the problems that large output delay is caused in the direct linear convolution filtering process and the higher the filter order, the larger the group delay are solved, and rapidity of protection action is greatly improved.

Description

Technical field [0001] The invention relates to a low-delay filter design method for sampling rate conversion in a transformer, which is designed based on a restricted least square method and belongs to the technical field of FIR filters. Background technique [0002] In the intelligent substation, the process layer of the microcomputer protection system adopts electronic transformers, and the connection between the secondary protection device of the bay layer and the process layer is realized through a network interface. The protection device receives the digital A / D sampled by different digital sources from the communication interface. The input signal has changed from a traditional single analog signal to a mixed input of multi-digital source sampling signals. The protection device based on the principle of differential protection usually needs to obtain the instantaneous differential current value, and the sampling frequency of the current sampling value of all branches conne...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 陈正才郑建勇梅军朱超黄潇贻倪玉玲崔志伟
Owner 句容建中电气有限公司
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