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Semiconductor device

A technology for semiconductors and devices, applied in the field of semiconductor devices using back gates, can solve problems such as difficult manufacturing processes, changes in the thickness of ultra-thin channels, and changes in threshold voltages

Active Publication Date: 2015-05-06
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, the ultrathin channel creates a new technical problem: the thickness variation of the ultrathin channel significantly changes the threshold voltage
As a result, the thickness of the semiconductor layer in the SOI MOSFET must be precisely controlled to obtain the desired threshold voltage, which leads to difficulties in the manufacturing process

Method used

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  • Semiconductor device
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Examples

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no. 1 example

[0022] figure 1 A cross-sectional view showing a schematic structure of a semiconductor device according to the present invention. The semiconductor device includes source / drain regions formed in an ultra-thin semiconductor layer 13 and a channel region between the source / drain regions, and the interface between the source / drain regions and the channel region is indicated by a dotted line in the figure. A front gate stack is formed above the channel region, including a front gate dielectric layer 14 on the ultra-thin semiconductor layer 13 and a front gate 15 on the front gate dielectric layer 14 . Spacer walls 16 are formed on both sides of the front gate stack. A conductive channel 19 passing through the interlayer dielectric layer 17 and electrically contacting the source / drain region is formed above the source / drain region. A back gate dielectric layer 12 and a back gate 11 are formed under the ultrathin semiconductor layer 13 , wherein the back gate dielectric layer 12 ...

no. 2 example

[0040] According to the second embodiment of the semiconductor device of the present invention, the front gate 15 and the back gate 11 are composed of the same material, and a forward bias voltage is applied to the front gate 15 and a forward bias voltage is applied to the back gate 11 during operation.

[0041] The thickness T of the ultra-thin semiconductor layer 13 Si When changing, this embodiment uses the forward bias voltage of the back gate 11 to change the surface potential φ calculated by the front gate 15 relative to the back gate 11 sp , so as to reduce or even completely cancel the influence of the thickness variation of the ultra-thin semiconductor layer 13 on the threshold voltage of the semiconductor device.

no. 3 example

[0043] According to the third embodiment of the semiconductor device of the present invention, the front gate 15 is made of high threshold voltage material, the back gate 11 is made of low threshold voltage material, and a forward bias voltage is applied to the front gate 15 during operation, and the back gate 11 is made of a material with a low threshold voltage. 11 Apply forward bias voltage.

[0044] The thickness T of the ultra-thin semiconductor layer 13 Si When changing, this embodiment not only utilizes the material combination of the front gate 15 and the back gate 11, but also uses the forward bias voltage of the back gate 11 to change the calculated surface potential φ of the front gate 15 relative to the back gate 11 sp , so as to reduce or even completely cancel the influence of the thickness variation of the ultra-thin semiconductor layer 13 on the threshold voltage of the semiconductor device.

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Abstract

A semiconductor device including: the source / drain regions formed in an ultra thin semiconductor layer(13), a channel region formed between the source / drain regions in the ultra thin semiconductor layer(13); a front gate stack above the channel region, which comprises a front gate(15) and a front gate dielectric layer(14) located between the front gate(15) and the channel region, a back gate stack below the channel region, which comprises a back gate(11) and a back gate dielectric layer (12)located between the back gate (11)and the channel region; wherein the front gate is formed from a high threshold voltage material, and the back gate is formed from a low threshold voltage material. By the combination of the front gate material and the back gate material of the semiconductor device, the fluctuations in the threshold voltage due to a thickness change in the channel region are reduced.

Description

technical field [0001] The present invention relates to semiconductor technology, and more particularly, to semiconductor devices using back gates. Background technique [0002] An important development direction of integrated circuit technology is to scale down the size of metal-oxide-semiconductor field-effect transistors (MOSFETs) to improve integration and reduce manufacturing costs. However, it is well known that short-channel effects occur as the size of MOSFETs decreases. [0003] As the size of the MOSFET is scaled down, the effective length of the gate is reduced, so that the proportion of depletion layer charge that is actually controlled by the gate voltage is reduced, so that the threshold voltage decreases as the channel length decreases. [0004] Subthreshold swing (subthreshold swing), also known as S factor, is an important parameter when a MOSFET works in a subthreshold state and is used as a logic switch. It is defined as: S=dVgs / d(log10 Id), the unit is ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/49
CPCH01L29/78603H01L29/78648
Inventor 梁擎擎许淼朱慧珑钟汇才
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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