Rejection of RF interferers and noise in a wireless communications transceiver

Abstract

An adaptable, reconfigurable, multi-band SAW-less radio receiver and / or transmitter is described that can operate within the limitations of 40nm and similar low voltage CMOS technology nodes, comprising: 1) A current output node from a single LNA or a number of LNAs. In the latter case, the current output node sums all of the separate LNA outputs. 2) A shunt style of steerable frequency notch filter for attenuating interferers added to the LNA current output node. 3) An adaptable negative conductance circuit that allows the amount of interference rejection provided by the notch filter to be varied with the bias current setting and RF device size setting. 4) An adaptable negative conductance circuit that allows parasitic resistance such as that encountered in a 40nm or similar low voltage CMOS technology node to be compensated for. The level of compensation can be a function of the setting of bias current and RF device width. 5) An overdrive monitor circuit that provides a signal which indicates the distribution of the available supply voltage between devices in the negative conductance circuit. This signal in turn can be applied to a local analog loop which adjusts the bias current and RF device width within the negative conductance circuit to maximize the linearity of the notch filter for a specific level of notch filter rejection. Alternatively, this control loop can be closed through the digital baseband. 6) A shunt style of steerable frequency notch filter placed prior to the PPA (pre-power amplifier) or PPAs in a cellular transmitter for rejecting transmitter noise occurring in the corresponding receiver band and / or spurious frequency components. 7) A steerable frequency notch filter placed prior to the LO (local oscillator) input to a frequency upconverter (transmitter application) or frequency downconverter (receiver application) to attenuate out of band noise and / or spurious frequency components.

Description

technical field [0001] The present invention generally relates to wireless transceivers for use in digital communication systems. More specifically, the present invention relates to a system and method for adaptively configurable suppression of RF interfering signals while avoiding the need for expensive off-chip RF SAW filters. The present invention incorporates such techniques to have a wide receiver dynamic range at minimum power consumption when implemented within the constraints of a low voltage CMOS process such as 40nm. Background technique [0002] US2005 / 0107051 (A1) May 19, 2005 Aparin et al. "Adaptive Filter for transmit Leakage Signal Rejection" [0003] US7221924 (B2) May 22, 2007 Zheng et al. "Wideband Monolithic Tunable High-Q Notch Filter for Image rejection in RF Application" [0004] US7266360 (B2) September 4, 2007 Kang et al. "Low Noise Amplifier for Wireless Communications" [0005] US2007 / 0264943 (A 1) November 15, 2007 Darabi H "Translation and Filt...

AI Technical Summary

Problems solved by technology

This leads to the specific problem that a high power transmitted signal may distort a desired weak signal received through a limited receiver linearity

The second point is that noise on a high power transmit signal will appear in the desired receiver band

The 40nm process provides opportunities for low-cost digital logic, memory integration, and high-frequency magnetic core transistors, but it also brings low supply voltage limits and high additional wiring impedance

The level of immunity to interference varies with the type of receiver, but is generally around 40dB, which means that external interfering signals in-band or near the edge of the band will prevent operation at moderate powers of -90dBm

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