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Digital lock phase amplification implementation method and system based on field programmable gate array

A technology of digital phase-locking and implementation method, which is applied in amplifiers, parametric amplifiers, amplifier types, etc., can solve the problem of high cost and achieve high practicability and low cost

Inactive Publication Date: 2012-10-10
深圳市经翎科技有限公司
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, digital lock-in amplifiers usually need to be equipped with a high-speed DSP processor, or a PC-based Matlab implementation, and the cost is relatively high

Method used

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  • Digital lock phase amplification implementation method and system based on field programmable gate array
  • Digital lock phase amplification implementation method and system based on field programmable gate array
  • Digital lock phase amplification implementation method and system based on field programmable gate array

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Embodiment Construction

[0030] The technical scheme of the present invention is described in detail below in conjunction with accompanying drawing:

[0031] See first figure 2 Schematic diagram of how a lock-in amplifier works. As shown in the figure, the input signal is s (t) , according to the principle of Fourier transform, the input signal can be obtained by and consists of two parts, of which is the effective signal that needs to be amplified, and is an irrelevant noise signal. In addition, the signal processor needs to be given a and The frequency is the same as a standard sine wave as a reference, and the wave function of the signal is Using the multiplier, the multiplication operation of two signals can be obtained as follows:

[0032]

[0033]

[0034]

[0035]

[0036]

[0037]

[0038] obviously m (t) is a composite signal where the DC component is If the AC component can be completely filtered out using a low-frequency filter, the DC component can be ob...

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Abstract

The invention relates to a digital lock phase amplification implementation method and system based on a field programmable gate array. According to the digital lock phase amplification implementation method based on the field programmable gate array, all signals are processed digitally according to the working principles of a lock phase amplifier, then the field programmable gate array is used to implement multiplication, filtering operation and the like. The digital lock phase amplification implementation system based on the field programmable gate array comprises an analog-to-digital converter, a lock phase loop and a field programmable gate array digital processor, wherein the analog-to-digital converter and the lock phase loop are both connected with the field programmable gate array digital processor. The technology provided in the invention is based on the common low-cost field programmable gate array, the low-cost high-speed and high-precision lock phase amplifier is obtained, and quite high practicality is achieved.

Description

【Technical field】 [0001] The invention relates to lock-in amplifier technology, in particular to a digital lock-in amplification realization method and system based on a field programmable gate array. 【Background technique】 [0002] In the fields of seismic waveform measurement, infrared, laser signal measurement, satellite signal reception, human physiological index measurement and other fields, it is usually necessary to amplify and restore weak signals of millivolt level or even smaller. Therefore weak signal processing is the key technology in these fields. Lock-in Amplifier (LIA) technology is an important means to detect weak signals submerged in noise signals. Lock-in amplification technology, also known as lock-in amplification technology, has many incomparable advantages over other weak signal processing technologies, including extremely high signal-to-noise ratio, strong anti-interference ability, and high measurement accuracy. It has been widely used in signal de...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03F7/00H03L7/00
Inventor 余菲赵杰
Owner 深圳市经翎科技有限公司
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