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Data processing engine

A data processing engine and endian technology, which is used in electrical digital data processing, program control design, instruments, etc., and can solve the problem of not particularly distinguishing memory address space.

Inactive Publication Date: 2011-04-27
ANDES TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These traditional control mechanisms do not specifically distinguish between memory address space and I / O address space

Method used

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Embodiment Construction

[0035] figure 2 It is a schematic diagram of a part of a data processing engine for establishing a data endian control mechanism according to an embodiment of the present invention. The data processing engine includes an endian register 210 , a spatial decoder 240 , an endian control device 250 , a register column 260 and a read / store unit 270 . The read / store unit 270 includes a byte swapper 280 .

[0036]The read / store unit may be a regular functional unit of a data processing engine, which executes a read / store instruction programmed by a user of the engine, or an implicit data movement function operated by the engine, To access certain non-instruction specific data, such as conversion look-aside buffer data or debugging data.

[0037] The endian register 210 stores a plurality of endian control bits 220 . Each endian control bit 220 identifies a default data endianness of a type that the data processing engine is allowed to access to a plurality of address spaces. Eac...

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Abstract

A data processing engine is provided, which includes an endian register, an endian control device, and a byte swapper. The endian register stores a plurality of endian control bits. Each endian control bit indicates the default data endianness of a type of address space accessible to the data processing engine. Each endian control bit is in either a big-endian state or a little-endian state. The endian control device is coupled to the endian register. The endian control device provides an endian signal according to the endian control bits and the instruction executed by the data processing engine. The endian signal is in either the big-endian state or the little-endian state. The byte swapper is coupled to the endian control device. The byte swapper transmits data and changes the byte order of the data when the byte order of the data is inconsistent with the state of the endian signal.

Description

technical field [0001] The invention relates to a data endian control mechanism, in particular to a data processing engine. Background technique [0002] A conventional data processing engine, such as a general purpose microprocessor, can access at least one address space. Each address space can be used to access memory or I / O devices, or both. The address spaces of memory and I / O devices can be distinguished by different read / store instructions. For example, the Loadmemory instruction is used to access the memory address space, and the LoadIO instruction is used to access the I / O address space. In addition, the address spaces of memory and I / O devices can also be distinguished according to physical address space segments (without address translation) or virtual address space segments (with address translation). Each of the above fragments has a different address range. [0003] In the field of computer architecture, the term "data endianness" is the order of data bytes ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/30
CPCG06F9/3824G06F9/30G06F9/30032G06F9/30025G06F9/30189G06F9/34
Inventor 赖吉昌
Owner ANDES TECH
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