High SFDR folding interpolation analog-to-digital converter

Abstract

The invention provides a high SFDR (spurious free dynamic range) folding interpolation analog-to-digital converter structure adopting cascade folding interpolator inter-stage switch 'pseudo random disorder sequence'. The folding interpolation analog-to-digital converter comprises a folding unit analog preprocessing module or an interpolation analog preprocessing module; the cascade folding interpolator inter-stage switch 'pseudo random disorder sequence' is a logic sequence for pseudo-randomly selecting a folding interpolation signal path for analog signals in a preprocessing process, and a folding interpolation circuit of each stage comprises two groups of switch logics, namely a positive disorder sequence switch logic and a corresponding negative disorder sequence removal switch logic. Moreover, the switch disorder sequence logics are divided into intra-stage disorder sequence logic and inter-stage disorder sequence combined logic. The intra-stage and inter-stage switch disorder sequence logics of the cascade folding interpolation circuit average the input equivalent imbalance between a folder and an interpolator in the processed adjacent quantification ranges to average the harmonic components introduced by mismatch into the noise floor so as to improve the spurious free dynamic range (SFDR) of the whole analog-to-digital converter.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a high-SFDR folded interpolation analog-to-digital converter using "pseudo-random disorder" switches between cascaded folded interposers. Background technique [0002] The folding interpolation ADC of the traditional cascade folding circuit such as figure 1 As shown, it mainly includes analog signal input terminal (1), track and hold circuit (2), voltage drive circuit (3), resistor series reference voltage generation circuit (4), pre-amplification circuit array (5), N-level cascade folding circuit (6), interpolation circuit (7), comparator circuit (8) and encoding circuit (9). The folded interpolation analog-to-digital converter of the traditional cascaded folded interpolation circuit such as figure 2 As shown, it mainly includes an analog signal input terminal (14), a tracking and holding circuit (15), a voltage driving circuit (16), a resistor string ...

AI Technical Summary

Problems solved by technology

[0004] The traditional and generally applicable solution is to use the original folded interpolation signal path or the mirror image folded interpolation signal path to input known test vectors, collect relevant information at the output end and perform feedback correction through the detection circuit. This correction method is on the one hand It is necessary to interrupt the normal working cycle of the ADC, and on the other hand, additional redundant power consumption is required, so it is not suitable for practical applications of folding and interpolating ADCs

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