Adjusting method for operating voltage of SRAM (static random access memory)

Abstract

The invention provides an adjusting method for minimum operating voltage of an SRAM (static random access memory), which can reach the optimal state. The SRAM receives voltage of a peripheral circuit and a memory unit. The adjusting method includes the following steps: first, a shmoo test is carried out on the SRAM to obtain a shmoo test graph and the minimum operating voltage; second, comparisonis carried out between the minimum operating voltage and a preset specification, and a specification positioning point of the preset specification is positioned on the line on the test graph that thevoltage of the peripheral circuit is equal to that of the memory unit; third, one of the voltage of the peripheral circuit or the memory unit is fixed, and the other voltage of the peripheral circuitor the memory unit is gradually lowered, so as to carry out the test on the SRAM and obtain the failure digit distribution; finally, processing parameters of the SRAM are adjusted according to the specification positioning point and the failure digit distribution.

Description

technical field [0001] The present invention relates to a method for adjusting process parameters of a memory, and in particular to a method for adjusting the minimum operating voltage of a static random access memory. Background technique [0002] Static Random Access Memory (SRAM) is a common random access memory. Its characteristic is that the data stored in the static random access memory will not disappear as long as the power is continuously supplied to the static random access memory. This is different from Dynamic Random Access Memory (DRAM), which needs to periodically update (re-flash) the data line, making SRAM still play an irreplaceable role in many electronic products today. status. [0003] A common SRAM is a so-called 6T structure composed of 6 transistors. Please refer here figure 1 A circuit diagram of a known 6T SRAM is shown. figure 1 A 1-bit SRAM 100 is shown. The SRAM 100 is mainly composed of four transistors PL1, PD1, PL2, PD2 to form a latch ci...

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Problems solved by technology

This situation makes it difficult for designers to adjust relative process parameters when SRAM needs to operate at lower operating voltages

[0007] The above-mentioned eye test can only show that the failure of the tested SRAM is mainly due to the write noise boundary or the static noise boundary

Therefore, such a permissive test cannot provide enough information for the designer to enable the designer to properly adjust the process parameters of the static random access memory corresponding to the static noise boundary or the write noise boundary, so as to further adjust its minimum operating voltage

At the same time, such eye tests cannot provide information on whether early failure bits are hidden in the

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