High aspect ratio structure

Abstract

A high aspect ratio structure is provided. The high aspect ratio structure includes a substrate, a plurality of stack structures, and a plurality of support structures. The stack structures are disposed on the substrate, and a trench is formed between adjacent two stack structures. Each of the stack structures includes a plurality of first material layers and a plurality of second material layers. The second material layers and the first material layers are disposed alternately. The support structures are respectively disposed between the substrate and the stack structures, wherein each of the support structures has a concave-convex surface.

Description

technical field [0001] The present invention relates to a high aspect ratio structure. Background technique [0002] As the size of semiconductor devices shrinks, in order to achieve high density and high performance, the manufacturing method of semiconductor devices has also evolved into stacking vertically upwards to more effectively utilize the wafer area. [0003] In the vertical memory device, when the device structure is stacked upwards, the relative relationship between each device and the structure of the stacked structure also become complicated. For example, when forming a high aspect ratio (high aspect ratio, HAR) structure, such as a trench with a high aspect ratio, the challenge is that the structures on both sides of the trench are likely to bend or collapse. This phenomenon not only causes difficulties in the connection of the subsequent process, but also causes adverse effects on the electrical testing of the semiconductor element. Therefore, how to avoid b...

AI Technical Summary

Problems solved by technology

For example, when forming a high aspect ratio (higher aspect ratio, HAR) structure, such as a trench with a high aspect ratio, the challenge to be faced is that the structures on both sides of the trench are prone to bending or collapse

This phenomenon not only causes difficulties in the connection of subsequent processes, but also causes adverse effects on the electrical testing of semiconductor components.

Images