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Method for sharing single EDMA (Enhanced Direct Memory Access) channel by multiple cores

A channel and a single technology, applied in the field of multi-core sharing a single EDMA channel, can solve problems such as resource access conflicts, achieve the effects of improving transmission efficiency, avoiding resource access conflicts, and simplifying the transmission process

Active Publication Date: 2016-04-13
GUANGZHOU HUIRUI SITONG INFORMATION SCI & TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to overcome the shortcomings and deficiencies of the prior art and provide a method for multiple cores to share a single EDMA channel. The method solves the problem of binding the shared interface with a single EDMA channel during chip design and may cause multiple cores to share resources caused by this interface. Access conflict problem, and can achieve each core can directly realize data transmission through EDMA channel, without inter-core forwarding, simplifying the data transmission process

Method used

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  • Method for sharing single EDMA (Enhanced Direct Memory Access) channel by multiple cores
  • Method for sharing single EDMA (Enhanced Direct Memory Access) channel by multiple cores
  • Method for sharing single EDMA (Enhanced Direct Memory Access) channel by multiple cores

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Embodiment

[0027] In this embodiment, there are N cores in total, of which there is only one main core Core h , the rest are from the core Core s (N≥s≥1, and s≠h);

[0028] Such as figure 1 As shown, the initialization process of the program is as follows:

[0029] Allocate the EDMA channel Channel bound to the shared interface data transmission h to the main core;

[0030] Allocation and Channel h EDMA channel Channel in the same EDMACC s to slave core;

[0031] Create a hardware semaphore HwSem with mutual exclusion function e , and initialize it to an idle state to be acquired by cores with data transmission requirements.

[0032] Such as figure 2 As shown, the main core Core h The data sending process is as follows:

[0033] In the program initialization phase, the EDMAChannel h Allocate to the main core and perform necessary initialization of its resources;

[0034] Before the data is sent, the main core obtains the hardware semaphore HwSem e , make sure other cores a...

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Abstract

The invention relates to a method for sharing a single EDMA (Enhanced Direct Memory Access) channel by multiple cores. The method comprises the following steps: 1, distributing EDMA Channelh and hardware semaphore HwSemh to a master core, distributing EDMA Channels to slave cores, and initializing the EDMA Channelh, the hardware semaphore HwSemh and the EDMA Channels; 2, applying, by the master core and the slave cores, the EDMA Channelh via the hardware semaphore HwSemh; 3, configuring PaRAM for the master core or the slave cores getting the EDMA Channelh; 4, enabling EDMA to transmit data, and receiving an EDMA interrupt generated after the data is transmitted; and 5, after the data is transmitted, releasing the hardware semaphore HwSemh and PaRAM resources. The method has the advantages that each core can directly transmit data via the EDMA channel, inter-core forwarding is not needed and the like.

Description

technical field [0001] The invention relates to the technical field of digital communication, in particular to a method for sharing a single EDMA channel by multiple cores. Background technique [0002] Single-core DSP can no longer meet the development needs of the digital communication field, and multi-core DSP chips have emerged as the times require, and have been rapidly developed in the communication field and widely used. The present invention agrees as follows to the multi-core DSP chip: there are N cores, recorded as Core 1 、Core 2 …Core N ; There are L hardware semaphores HwSem in total. The hardware semaphore is a mutually exclusive semaphore, which is used for multi-core access protection of the same resource; there are M shared interfaces in total, which are recorded as Interface 1 、Interface 2 ,...,Interface M ; A total of X EDMACC (EDMAChannelControl, EDMA channel controller), recorded as EDMACC 1 、EDMACC 2 …EDMACC X ; The xth EDMACC has a total of x H...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/32
CPCG06F13/32
Inventor 王敏
Owner GUANGZHOU HUIRUI SITONG INFORMATION SCI & TECH CO LTD
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