A method of manufacturing a floating grid

Abstract

The present application provides a method for manufacturing a floating gate. The manufacturing method includes: forming a tunnel oxide layer and a shallow trench isolation structure on a semiconductor substrate, the shallow trench isolation structure includes a top structure and a main body structure, and the sidewall of the top structure is recessed into the top structure to form a depression; forming a floating gate polysilicon layer on the oxide layer, the floating gate polysilicon layer has a protrusion filling the recess; etching and removing at least part of the top structure; performing ion implantation on the exposed protrusion, forming a first ion implantation layer on the protrusion; Oxidizing the first ion implantation layer to form a first oxide layer; etching and removing the first oxide layer to form a floating gate. The first ion implantation layer is formed on the protruding part, and then the first oxide layer is formed on the first ion implantation layer. The structure of the first oxide layer is very different from that of the floating gate polysilicon layer, and the first oxide layer is removed by etching using the above difference. After layering, the irregular protrusions are modified to obtain regular-shaped floating gates.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a method for manufacturing a floating gate. Background technique [0002] Flash memory components have become a widely used device for personal computers and electronic devices due to their advantages of being able to store, read, and erase data multiple times, and the stored data will not disappear after power failure. non-volatile memory element. [0003] A typical flash memory device includes doped polysilicon to manufacture a floating gate (Floating Gate, FG) and a control gate (Control Gate, CG). Such as figure 2 As shown, the floating gate 104 is separated from the control gate by a stacked gate dielectric layer, and the floating gate 104 is separated from the semiconductor substrate 100 by a tunnel oxide layer 101 (Tunnel Oxide, TO), and the adjacent floating gate 104 are isolated by a shallow trench isolation (STI) 102 disposed in the...

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Problems solved by technology

Therefore, the existence of the protruding portion 131 in the floating gate 104 causes the floating gate 104 to be irregular in shape and the distance between adjacent floating gates 104 to become smaller, and the upper and lower distances of the irregularly shaped adjacent floating gates 104 are different, so that the floating gate 104 It is easy to generate mutual interference during use, so that the storage device has a potential risk of data loss

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