A Real-time A/D Fault Diagnosis Method Based on FPGA

A diagnosis method and real-time fault technology, applied in the direction of analog/digital conversion calibration/testing, etc., can solve the problems of time-consuming and laborious, poor real-time SV data, unable to guarantee illegal SV detection, etc., achieving strong portability and shortening the re-development cycle. , Improve the effect of anti-interference

Inactive Publication Date: 2018-05-11
XJ ELECTRIC +1
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Problems solved by technology

At present, the CPU mainly uses complex software algorithms to detect whether the SV is abnormal, which is time-consuming and laborious and cannot guarantee that all illegal SVs can be detected, and the real-time performance of SV data detected by software is poor.

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  • A Real-time A/D Fault Diagnosis Method Based on FPGA
  • A Real-time A/D Fault Diagnosis Method Based on FPGA
  • A Real-time A/D Fault Diagnosis Method Based on FPGA

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specific Embodiment approach

[0028] As a specific implementation mode, the Spartan6 series XC6SLX4 of Xilinx Company and the AD7606 of ANALOGDEVICES Company are selected, each A / D has 8 channels, so 12 A / Ds are used to support 96 channels, and the parallel processing characteristics of FPGA fully satisfy Real-time detection of the 12 A / Ds.

[0029] The present invention connects the eighth channel of each A / D to the power supply VCC for A / D self-inspection. Implementation method: FPGA detects the output characteristic signals and A / D of 12 A / D chips in each sampling cycle. Self-inspection channel, record the level changes of 12 A / D characteristic signals and do power self-inspection on 12 A / Ds, if the requirements are not met, the A / D is considered to be faulty. Such as figure 2 Shown is the hardware block diagram of the A / D real-time fault diagnosis system of the FPGA of the present invention. First, the system is powered on, and the FPGA is configured from the external flash. After the configuration ...

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Abstract

The present invention relates to a kind of A / D real-time fault diagnosis method based on FPGA, A / D chip connects CPU through FPGA; FPGA completes A / D fault information diagnosis while collecting A / D data, and records A / D fault, will A / D fault information and A / D data generate a frame message and send it to the peer CPU. The present invention overcomes the deficiency that the existing CPU software cannot effectively detect SV data in real time, and provides an FPGA-based A / D real-time fault diagnosis system, which has strong real-time performance, good scalability and portability, and not only realizes SV data detection at the sampling source Data detection also helps to locate the problem of the faulty A / D chip.

Description

technical field [0001] The invention relates to the field of relay protection automation of electric power engineering, in particular to an FPGA-based A / D real-time fault diagnosis method. technical background [0002] The realization of smart substation is based on the digital collection of smart equipment information, and digital sampling is the basic function of protection devices. In the smart substation system, the analog quantity sampling value (Sampled Value, SV) is obtained mainly through A / D acquisition of analog quantity. The A / D chip is a key device for digital acquisition, and its normal operation is the prerequisite for the normal operation of the protection device. At present, the CPU mainly uses complex software algorithms to detect whether the SV is abnormal, which is time-consuming and laborious and cannot guarantee that all illegal SVs can be detected, and the real-time performance of the SV data detected by the software is poor. In order to detect the va...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/10
Inventor 赵会彬吕玄兵周东杰孙振华姚艳艳高传发任华锋
Owner XJ ELECTRIC
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