Inter-heterogeneous-processor SPI (serial peripheral interface) high speed two-way peer-to-peer data communication system

Abstract

The invention provides an inter-heterogeneous-processor SPI high speed two-way peer-to-peer data communication system. The inter-heterogeneous-processor SPI high speed two-way peer-to-peer data communication system comprises an SPI bus and communication nodes, wherein processors of at least two communication nodes are heterogeneous; a node main occupation signal line, a node main output slave input signal line, a node main input slave output signal line, a node serial shift clock signal line and a node slave gate signal line of the communication nodes are mounted to a network main occupation signal line, a network main output slave input signal line, a network main input slave output signal line, a network serial shift clock signal line and a network main occupation signal line of the SPI bus respectively. The inter-heterogeneous-processor SPI high speed two-way peer-to-peer data communication system achieves the interconnection of the heterogeneous processors and the establishment of a heterogeneous processor network of dozens of mega based on the SPI bus, and improves the speed of multi-machine two-way peer-to-peer data communication substantially.

Description

technical field [0001] The invention relates to the multi-machine communication field of a multi-machine control system, in particular to a high-speed two-way peer-to-peer data communication system based on an SPI bus-based heterogeneous processor network. Background technique [0002] The multi-machine control system based on embedded microprocessors with different architectures has been widely used in various aspects of modern production such as industrial control. Especially when the system collects and processes real-time data, it puts forward special requirements for the transmission of relevant data, and multi-machine communication becomes one of the key technologies in multi-machine systems. [0003] There are many embedded microprocessor architectures. For the multi-computer communication between heterogeneous processors, serial buses such as RS-232 and RS-485 were mainly used in the early days to realize device interconnection, and the master-slave polling communica...

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Problems solved by technology

[0009] This patent relates to a device for asynchronous data transmission using dual-port RAM, which effectively prevents the error of reading data and the loss of writing data in the case of reading priority when using a general dual-port RAM. , so that the data content is effectively updated, focusing on solving the problems in the use of dual-port RAM, but it does not take advantage of the large capacity of dual-port RAM and the independent characteristics of dual-port, and does not realize high-speed data communication

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