Sub-circuit extracting method of digital logic circuit

Abstract

The invention discloses a sub-circuit extracting method of a digital logic circuit. By the aid of disjoint sharp-operations between logic function product terms, the product term set belonging to the logic functions corresponding to the sub circuits is eliminated from the product term set of the logic functions corresponding to original circuits, so that sub-circuit extraction from the original circuits is realized. A novel circuit construction method with sub circuits is further provided to be equivalent to logic functions of the original circuits.

Description

technical field [0001] The invention relates to a method for optimizing a digital logic circuit, in particular to a method for extracting a sub-circuit of a digital logic circuit. Background technique [0002] On the premise of keeping the function of the digital logic circuit unchanged, how to reduce the area of ​​the circuit, that is, optimize the area of ​​the circuit, has always been an important goal of the logic synthesis and optimization of the digital circuit. In digital circuit logic optimization, in order to realize circuit area optimization, it is often necessary to separate some parts of the original circuit as sub-circuits from the original circuit and extract them to achieve the purpose of circuit simplification. [0003] Assume that the expression of the logic function f corresponding to a digital circuit is: [0004] f ( a , b , c , d ...

AI Technical Summary

Problems solved by technology

(1) f 1 completely belongs to f; (2) f 1 Only partly belongs to f; (3) f 1 has no common part with f

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