Data writing method, device and system

Abstract

The embodiment of the invention discloses a data writing method, a data writing device and a data writing system. The invention relates to the field of communication. According to request information sent by an input terminal and a predetermined double polling rule, intermediate caches are distributed for the input terminal to further improve the fair degree of data transmitted by each input terminal and the uniform degree of data frame reaching the intermediate cache within adjacent time slots so as to reduce the probability of data frame lost and readout conflict. The method provided by the embodiment of the invention comprises the steps of: obtaining the request information sent by the input terminal with data transmission need in a current time slot; distributing a first intermediate cache for a first input terminal in the current time slot according to the request information and the predetermined double polling rule; and sending identifier information of the first intermediate cache to the first input terminal, and writing data to the first intermediate cache by the first input terminal according to the identifier information of the first intermediate cache.

Description

technical field [0001] The present invention relates to the communication field, in particular to a data writing method, device and system. Background technique [0002] Distributed Shared Memory Switch (SMS) architecture is a network switching architecture, generally used in switches and routers, mainly composed of multiple input ports, first-level switching network, multiple intermediate caches, second Level switching network and multiple output ports are composed of five parts. Among them, the first-level switching network is used to send the data of the input port to the intermediate cache, and the second-level switching network is used to send the data in the intermediate cache to the corresponding output port. The first and second-level switching networks can share Multiple intermediate caches. [0003] The SMS architecture adopts a shared intermediate cache, so it can save storage resources and wiring resources in hardware implementation, and at the same time facili...

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Problems solved by technology

[0005] In the process of realizing the above data writing, the inventor found at least the following problems in the prior art: the above method adopts a random matching method, which causes unfair opportunities for each input port to transmit data, and each input port arrives in an adjacent time slot. The data frames in the intermediate cache are not uniform, resulting in the loss of data frames and the high probability of reading conflicts

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