Fmcw radar apparatus having a plurality of processor cores used for signal processing
A technology of radar equipment and signal processing unit, which is applied in directional multi-channel systems using radio waves, direction finders and instruments using radio waves. The effect of shortening the time
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no. 1 example
[0030] refer to Figure 1 to Figure 4 , the first embodiment is described below. The overall configuration of the FMCW radar device (hereinafter referred to as "radar device") according to the first embodiment has been described. like figure 1 As shown, the radar apparatus 1 according to the first embodiment is an apparatus capable of detecting the distance between the target object and the own vehicle, the relative speed between the target object and the own vehicle, and the direction of the target object relative to the own vehicle. The radar device 1 includes a transmission / reception device 3 that transmits and receives radar waves and a signal processing unit 5 that controls the radar device 1 and processes various operations to detect a target object.
[0031] In particular, the radar device 1 is provided with a D / A (digital to analog) converter 7, a voltage controlled oscillator (VCO) 9, a distributor 11 and a transmitting antenna 13, wherein the D / A converter 7 respo...
no. 2 example
[0088] refer to Figure 5 , the second embodiment will be described below. In the second embodiment, similar contents to those in the first embodiment are omitted. According to the second embodiment, as Figure 5 As shown, unlike the radar apparatus of the first embodiment which puts multiple cores (for example, dual cores) in a single microprocessor (single-chip microprocessor), a plurality of microprocessors (single-chip microprocessor) 55 and 57 ( For example, two microprocessors) are arranged in the signal processing unit 53 of the radar device 51 .
[0089] In the first microprocessor 55, similarly to the first core, FFT processing is performed immediately after the reception data (up beat signal) at the up-shift modulation is obtained. In the second microprocessor 57 , FFT processing is performed in parallel with the processing performed at the microprocessor 55 immediately after the reception data at the down-shift modulation (down-shift beat signal) is obtained.
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