Mismatch calibration method for streamline ADC (Analog-to-Digital Converter) multi-bit sub DAC (Digital-to0Analog Converter) capacitor

Abstract

The invention discloses a mismatch calibration method for a streamline ADC (Analog-to-Digital Converter) multi-bit sub DAC (Digital-to-Analog Converter) capacitor. The mismatch calibration method comprises the following steps of: firstly, initializing a streamline-stage analogue input signal to be calibrated and enabling the outputs of voltage comparators in a sub ADC to be 0 respectively; secondly, measuring an output voltage value of an MDAC (Multiplexing Analog-to-Digital Converter) in the streamline stage; thirdly, setting the output of the ith voltage comparator in the sub ADC to be 1, setting outputs of other voltage comparators to be 0 and then measuring the output voltage value of the MDAC again; fourthly, calculating to obtain a mismatch error value of paired capacitors; fifthly, calculating an output voltage error value of the MDAC in the streamline stage to be calibrated according to the mismatch error value of the paired capacitors; sixthly, connecting a compensation circuit to next streamline stage of the streamline stage to be calibrated in the fifth step and calibrating compensation voltage; and seventhly, compensating the mismatch error of the sub DAC capacitor in the streamline stage to be calibrated according to the obtained compensation voltage. The calibration method can be used for calibrating nonlinear error and simultaneously has higher calibration precision.

Description

technical field [0001] The invention relates to a pipeline ADC multi-bit sub-DAC capacitance mismatch calibration method, which is mainly used for calibrating the nonlinear error introduced by capacitance mismatch in a high-precision pipeline ADC adopting a multi-bit pipeline structure per stage, and belongs to mixed signal integration Circuit technology field. Background technique [0002] Modern communication systems require high-speed and high-precision A / D converters (hereinafter referred to as ADCs). The high precision of the ADC can prevent distortion and loss of weak signals, and the application of high-speed ADC can reduce the frequency conversion times of the system. Among ADCs of various structures, the pipelined ADC has become a popular research structure for high-performance ADCs due to its excellent compromise characteristics among precision, speed, and power consumption. [0003] The conversion accuracy of the pipeline ADC is limited by various errors in the ...

AI Technical Summary

Problems solved by technology

[0013] The problem solved by the technology of the present invention is: to overcome the deficiencies in the prior art, a kind of pipeline ADC multi-bit sub-DAC capacitance mismatch calibration method is proposed, which solves the problem that the normal capacitance mismatch calibration method cannot calibrate the nonlinear error, not only Improve the linearity and dynamic range of the pipeline ADC without affecting the normal data conversion process of the ADC

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