Memory control device with configurable ECC (Error Correction Code) parameter

A control device and memory technology, applied in static memory, read-only memory, information storage, etc., can solve the problem that the length of data packets cannot be fully adapted

Inactive Publication Date: 2014-05-07
SINO WEALTH ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Obviously, the fixed data packet length cannot fully meet people's requirements for NAND Flash applications.

Method used

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  • Memory control device with configurable ECC (Error Correction Code) parameter
  • Memory control device with configurable ECC (Error Correction Code) parameter
  • Memory control device with configurable ECC (Error Correction Code) parameter

Examples

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Embodiment Construction

[0061] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0062] The first embodiment of the memory control device with configurable ECC parameters

[0063] figure 2 The principle of the first embodiment of the memory control device with configurable ECC parameters of the present invention is shown. See figure 1 , the memory control device 10 of this embodiment includes: an ECC module 100 , an ECC code data packet length register 101 , an iteration initial value register set 102 and a memory interface 103 . In this embodiment, the memory control device 10 is an example of a control device of a flash memory storage device, that is, a NAND flash memory 12 (NAND Flash) is connected to the memory control device 10 . Moreover, in this embodiment, the ECC code is described by taking the BCH code as an example.

[0064] For the memory control device 10 of the present embodiment, the parameter of the error corr...

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Abstract

The invention discloses a memory control device with a configurable ECC (Error Correction Code) parameter, which can be used for configuring the data block length and the error correction capability of an ECC module within a certain range. The device is internally provided with an ECC code data block length register and an ECC code error correction capability register which are respectively used for storing the data block length and the code error correction of an ECC code. In practical application, a user sets the two registers through a CPU according to the requirement of a flash memory. The memory control device is also provided with a generated multinomial register or a generated multinomial list and an iteration initial value register set or an iteration initial value list, and corresponding encoding and decoding operations are carried out through the generated multinomial register and the iteration initial value register set based on numerical values in the ECC code data block length register and the ECC code error correction capability register so as to meet different requirements on error correction codes of the flash memory.

Description

technical field [0001] The invention relates to a device related to memory, in particular to a memory control device with data error correction coding. Background technique [0002] With the increasing informatization of people's lives, digital data storage is ubiquitous and has become an indispensable key technology in today's information society. NAND flash memory (also referred to as NAND Flash) is an emerging digital storage medium, which is used more and more widely. In the practical application of NAND Flash, Error-Correcting Code (ECC) technology plays a vital role. This is because bit errors occur in the process of reading and writing data in NAND Flash. The ECC codes applied to NAND Flash mainly include Hamming code, RS code and BCH code. Hamming codes can only correct 1-bit errors and check 2-bit errors. Therefore, with the continuous improvement of NAND Flash's requirements for ECC code error correction capabilities, Hamming codes are gradually replaced by othe...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/06G11C29/42
Inventor 张江安张钦
Owner SINO WEALTH ELECTRONICS
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