SOC circuit with 8-bit-based MCU as kernel and control method of system using SOC circuit

Abstract

The invention relates to an SOC circuit with an 8-bit-based-MCU as kernel and a control method of a system using the SOC circuit. The SOC circuit with the 8-bit-based-MCU as kernel comprises a microcontroller and is characterized by further comprising a random memory and a DMA controller; wherein the random memory comprises a first program region and a second program region; the microprocessor isused for executing the programs stored in the random memory; the DMA controller is used for controlling program data to be transmitted to the first and the second program region of the random memory.The SOC circuit can be applicable to hardware with higher demands on computation speed and features more convenient data storage and reading and more flexible development process.

Description

technical field [0001] The invention relates to an SOC circuit based on an 8-bit MCU as the core and a control method for a system using the circuit. Background technique [0002] With the development of embedded systems and the development of System On Chip (SOC) level products, embedded operating systems are more widely used. However, in the field of consumer electronics, market competition is becoming more and more fierce, and the pressure on product costs is increasing. In the development process of SOC-level products, the application of embedded operating systems needs to provide hardware system support, especially memory and system Support for installation space. In addition, the embedded operating system is mostly used for a central processing unit (Central Processing Unit, CPU) with more than 16 bits. In some fields with fierce market competition, in order to save costs, an 8-bit microcontroller (Mircro-ControlUnit, MCU) is used, and less program space is used, tha...

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Problems solved by technology

For a 64K address space and a 16-bit data length read-only memory (Read Only Memory, ROM), if a parallel FLASH memory is used, 32 external buses will be connected, which is difficult to accept for packaging costs

If a serial electrically erasable programmable read-only memory (EEPROM) is used, the cost and price are also high, and if the instructions and data are input through the IIC bus in real time, the speed of the MCU is only about 20K at most, which cannot be used normally.

Although the cost of FLASH memory using Serial Peripheral Interface (SPI) is lower than that of EEPROM, it can be accepted in terms of cost, but if real-time reading is used, the speed of MCU is only about 2M, which cannot meet the requirements of the system. need

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