Embedded boundary scanning technique verification platform

A technology of boundary scan and verification platform, applied in the direction of measuring devices, instruments, measuring electricity, etc.

Inactive Publication Date: 2009-06-17
CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] The purpose of the present invention is to provide a verification platform for embedded boundary scan technology to solve problems such as interconnection of devices with JTAG ports, detection of soldering defects, state sampling of discrete signals and JTAG devices, fault analysis and diagnosis, etc., to improve machine performance. product design level

Method used

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  • Embedded boundary scanning technique verification platform
  • Embedded boundary scanning technique verification platform
  • Embedded boundary scanning technique verification platform

Examples

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Embodiment Construction

[0022] Such as figure 1 As shown, a kind of embedded boundary scan technical verification platform, comprises the multiple embedded module test that is connected by TM bus and maintains bus interface unit (bus interface unit, be called for short BIU) and JTAG link interface, described multiple embedded The module test and maintenance bus interface unit is provided with a JTAG interface, and the JTAG interface is connected with the JTAG link interface.

[0023] Wherein, a bus monitor is also included, and the multiple embedded module test and maintenance bus interface units are connected to the bus monitor.

[0024] Wherein, the TM bus is a serial backplane bus with a multi-site topology, consisting of four required signal lines and an optional signal line in the following table:

[0025] signal name I / O illustrate MCLK enter TM bus clock MCTL input Output TM bus control MMD input Output TM bus master module data MSD input Output...

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Abstract

The invention relates to an embedded boundary scan technology testing platform, which comprises a plurality of embedded module test and maintenance bus interface units connected with a TM bus and a JTAG link interface; the embedded module test and maintenance bus interface unit is provided with a JTAG interface; the JTAG interface is connected with the JTAG link interface; a principal and subordinate communication protocol is used between the embedded module test and maintenance bus interface units. As an improvement, the invention also comprises a bus monitor; a plurality of embedded module test and maintenance bus interface units are connected with the bus monitor. In the invention, built-in self-testing and functional circuits are divided, therefore, wire connection and welding faults can be detected well before the normal work, state monitoring and fault positioning can be carried out during the working process, thus not only meeting the requirement of a module during the production debug, but also meeting the requirement of on-site maintenance in use.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design and embedded testing, and in particular relates to boundary scan technology. Background technique [0002] As more and more fields use software and microprocessors to control a variety of embedded devices, it is even more important to quickly and efficiently test increasingly complex systems. In order to reduce maintenance costs, the test system must implement centralized management and unified coordination, improve test quality with the help of embedded diagnostic data, and take a systematic and standardized development path. With the advancement of technology and the increasing complexity of the system, reliability, maintainability and comprehensive support work has become an important part of the development project. [0003] The boundary-scan technology is based on the IEEE std 1149.1 standard (IEEE Standard TestAccess Port and Boundary-Scan Architecture, that is, the test a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/3185
Inventor 周梅章宇东李修杰张益萍
Owner CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
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