Squarer circuit and implementing method thereof
An implementation method, a squarer technology, which can be applied to instruments, devices that perform computing operations by changing electricity or magnetic quantities, analog computers, etc., and can solve serious problems such as waste of resources and so on.
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[0029] Below in conjunction with accompanying drawing and embodiment, the specific embodiment of the present invention is described in further detail:
[0030] Embodiment 1 of the present invention provides an implementation circuit of a 4-bit signed number squarer, and the binary expression of the 4-bit signed number is:
[0031] A=a 3 ×2 3 +a 2 ×2 2 +a 1 ×2 1 +a 0 ×2 0 ,
[0032] where a i =0 or 1, i=0,1,2,3;
[0033] Such as image 3 As shown, the circuit includes: an acquisition module 310 , a first summing module 320 , a second summing module 330 , a third summing module 340 , and a combining module 350 .
[0034] Wherein, the obtaining module 310 is used to obtain the mutual multiplication term, self-multiplication term and supplementary term occurring in the square process according to the input data, and the input terminal is the value of each digit of a 4bit signed number: a 3 、a 2 、a 1 、a 0 , the output terminal is the mutual multiplication term, self ...
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