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High speed digital-analog converter with ten bits current rudder structure

A digital-to-analog converter and current steering technology, applied in the direction of physical parameter compensation/prevention, can solve problems such as system instability, low chip yield, and high price, and achieve strong anti-interference ability, eliminate gradient errors, and eliminate heat distribution uneven effect

Inactive Publication Date: 2011-03-23
HUNAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Due to the above reasons, the yield of chips containing high-speed and high-precision DAC converters is low and the price is high, and the performance changes with time, resulting in system instability, etc.

Method used

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  • High speed digital-analog converter with ten bits current rudder structure
  • High speed digital-analog converter with ten bits current rudder structure
  • High speed digital-analog converter with ten bits current rudder structure

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Embodiment Construction

[0027] The present invention adopts a "6+4" segmented structure, that is, the upper 6 bits adopt a thermometer code structure, and the lower 4 bits adopt a binary weighted structure.

[0028] figure 2 It is a schematic diagram of the high-speed DAC structure of the 10-bit current steering structure of the present invention. The DAC of the present invention mainly includes the following modules: digital input latch 100, clock buffer 101, row decoder 102a, column decoder 102b, 64 current switch matrix 103, 4LSB current switch unit 104, current-voltage Converter 105. exist figure 2 Among them, there are digital data input and clock signal input, Iop and Ion are complementary current output terminals, and VOP and VON are complementary voltage output terminals.

[0029] Digital data is divided into 3 segments for decoding. The highest 3MSB and the second highest 3MSB perform column decoding and row decoding respectively. The input of the row and column decoders 102a and 102b...

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Abstract

The invention relates to a high speed digital-analog converter of a 10-bit current steering structure, including a clock buffer; a digital input latch of the latching input signal, wherein the output end outputs the three highest bits, the three secondary highest bits and the four lowest bits; a rank encoder for coding the three highest bits; a row encoder for coding the three secondary highest bits; four LSB current switch units; 64 current switch matrixes for outputting the current after overlapping with the four LSB current switch units to the complementary current output level corresponding to the output of the encoder; the current is output in the differential voltage mode after the current to the voltage conversion mode.

Description

technical field [0001] The invention relates to a digital-to-analog converter, in particular to a high-speed digital-to-analog converter with a 10-bit current steering structure. Background technique [0002] The digital-to-analog converter (hereinafter referred to as DAC) is an important topic in the field of analog integrated circuit design. The DAC with the traditional current steering structure requires the cooperation of a precision current source group to achieve higher precision. At the same time, due to the high noise of the CMOS structure logic circuit, undue noise and glitches are caused to the current transfer switch. DAC is a typical analog integrated circuit, but with the enhanced function and speed of digital signal processor (DSP), using the same digital integrated circuit processing technology as DSP, integrating DAC and DSP on the same chip, not only can Reduce costs and improve system performance. [0003] figure 1 Schematic of implementing a DAC for a ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/06H03M1/08
Inventor 何怡刚黄姣英张松华
Owner HUNAN UNIV
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