Multi-degree-of-freedom mechanical arm driving controller

Abstract

The invention discloses a multi-degree-of-freedom mechanical arm driving controller, and relates to the technical field of mechanical arm control systems. The multi-degree-of-freedom mechanical arm driving controller comprises a processor module and a motor driving module, the processor module comprises an ARM processing module, a clock reset signal processing module and a bus arbitration module, the ARM processing module is electrically connected with the clock reset signal processing module, the clock reset signal processing module is electrically connected with the bus arbitration module, and the bus arbitration module is connected with the motor driving module; and the motor driving module comprises a motor driving bus communication module, a signal line shunting and converging related IP module, a robot pulse driving module 1, a robot pulse driving module 2 and an emergency stop protection module, and the motor driving bus communication module is electrically connected with the signal shunting and converging related IP module. According to the multi-degree-of-freedom mechanical arm driving controller, the IP is driven based on the stepping motor of a FPGA, and driving and control integration is achieved.

Description

technical field [0001] The invention belongs to the technical field of mechanical arm control systems, and in particular relates to a multi-degree-of-freedom mechanical arm drive controller. Background technique [0002] The integrated drive and control system has gained widespread attention due to its advantages of small size, flexible deployment, and low cost. A drive-control integrated system requires resources such as high-performance calculators, high-speed information exchange, sufficient storage space, and rich peripheral interfaces. The choice of core processor is the focus of system design. The embedded system has become the first choice for the integrated drive and control system due to its convenient development, strong scalability, and high real-time performance; the MCU has a low main frequency and poor data processing capabilities, and is not suitable for systems with high computing performance requirements. DSP By adding multipliers and optimizing the memory...

AI Technical Summary

Problems solved by technology

[0004] ASIC processors have high performance, but the system design process is complex and development efficiency is low; FPGA performance per unit area is relatively low, but the system implementation cycle is short, and the development and verification efficiency is higher. Most of the integrated drive and control systems use ARM+DSP+FPGA distributed structure

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